#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
#undef CONFIG_SPD_EEPROM /* do not use SPD EEPROM for DDR setup*/
-#define CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_DDR_DLL /* possible DLL fix needed */
#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
+#define CONFIG_DDR_ECC /* only for ECC DDR module */
+#define CONFIG_MEM_INIT_VALUE 0xDEADBEEF
+
/*
* sysclk for MPC85xx
/*
* Determine DDR configuration from I2C interface.
*/
- #define SPD_EEPROM_ADDRESS 0x51 /* DDR DIMM */
+ #define SPD_EEPROM_ADDRESS 0x58 /* DDR DIMM */
#else
/*
#undef CFG_RAMBOOT
#endif
+#define CFG_FLASH_CFI_DRIVER
+#define CFG_FLASH_CFI
+#define CFG_FLASH_EMPTY_INFO
#undef CONFIG_CLOCKS_IN_MHZ
-
/*
* Local Bus Definitions
*/
-
#define CFG_LBC_LCRR 0x00030004 /* LB clock ratio reg */
#define CFG_LBC_LBCR 0x00000000 /* LB config reg */
#define CFG_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
#define CFG_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/
-
+
#define CONFIG_L1_INIT_RAM
#define CFG_INIT_RAM_LOCK 1
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-/* I2C */
-#define CONFIG_HARD_I2C /* I2C with hardware support*/
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C /* I2C with hardware support*/
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
#define CFG_I2C_SLAVE 0x7F
#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET 0x3000
/*
* EEPROM configuration
#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
-#undef CONFIG_EEPRO100
-#undef CONFIG_TULIP
+#define CONFIG_EEPRO100
+#define CONFIG_E1000
+#undef CONFIG_TULIP
#if !defined(CONFIG_PCI_PNP)
#define PCI_ENET0_IOADDR 0xe0000000
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_MPC85XX_TSEC1 1
+#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
#define CONFIG_MPC85XX_TSEC2 1
-#define TSEC1_PHY_ADDR 2
-#define TSEC2_PHY_ADDR 3
+#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
+#define TSEC1_PHY_ADDR 0
+#define TSEC2_PHY_ADDR 1
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
#define CONFIG_MPC85XX_FEC 1
-#define FEC_PHY_ADDR 1
+#define CONFIG_MPC85XX_FEC_NAME "FEC"
+#define FEC_PHY_ADDR 3
#define FEC_PHYIDX 0
-#define CONFIG_ETHPRIME "MOTO ENET0"
+/* Options are: TSEC[0-1] */
+#define CONFIG_ETHPRIME "TSEC0"
#define CONFIG_HAS_ETH1 1
#define CONFIG_HAS_ETH2 1
#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
| CFG_CMD_EEPROM \
| CFG_CMD_DATE \
+ | CFG_CMD_MII \
| CFG_CMD_PCI \
| CFG_CMD_PING \
| CFG_CMD_I2C)
#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
| CFG_CMD_EEPROM \
| CFG_CMD_DATE \
+ | CFG_CMD_MII \
| CFG_CMD_PING \
| CFG_CMD_I2C)
#endif
#define CONFIG_ETH2ADDR 00:40:42:01:00:02
#endif
-#define CONFIG_IPADDR 192.168.0.103
-#define CONFIG_HOSTNAME PM854
-#define CONFIG_ROOTPATH /opt/eldk30/ppc_82xx
-#define CONFIG_BOOTFILE uImage
+#define CONFIG_ROOTPATH /opt/eldk/ppc_85xx
+#define CONFIG_BOOTFILE pm854/uImage
-#define CONFIG_SERVERIP 192.168.0.54
+#define CONFIG_HOSTNAME pm854
+#define CONFIG_IPADDR 192.168.0.103
+#define CONFIG_SERVERIP 192.168.0.64
#define CONFIG_GATEWAYIP 192.168.0.1
#define CONFIG_NETMASK 255.255.255.0
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=400000\0" \
- "ramdiskfile=uRamdisk\0"
+ "ramdiskfile=pm854/uRamdisk\0"
#define CONFIG_NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \