Merge with /home/mk/11-cmb1920/u-boot#4upstream

[oweals/u-boot.git] / include / configs / PM854.h

diff --git a/include/configs/PM854.h b/include/configs/PM854.h
index b3e1f5e98ee03f0df622254d017811c29ad501a4..4fb54402b1b6d5c051ecd2bc0ad8918ee55cac8f 100644 (file)
--- a/include/configs/PM854.h
+++ b/include/configs/PM854.h
@@ -45,10 +45,12 @@
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
 #undef CONFIG_SPD_EEPROM               /* do not use SPD EEPROM for DDR setup*/
-#define CONFIG_DDR_ECC                 /* only for ECC DDR module */
 #define CONFIG_DDR_DLL                 /* possible DLL fix needed */
 #define CONFIG_DDR_2T_TIMING           /* Sets the 2T timing bit */
 
+#define CONFIG_DDR_ECC                 /* only for ECC DDR module */
+#define CONFIG_MEM_INIT_VALUE          0xDEADBEEF
+
 
 /*
  * sysclk for MPC85xx
@@ -191,12 +193,16 @@
 #define CFG_PROMPT_HUSH_PS2 "> "
 #endif
 
-/* I2C */
-#define         CONFIG_HARD_I2C                /* I2C with hardware support*/
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address */
 #define CFG_I2C_SLAVE          0x7F
 #define CFG_I2C_NOPROBES       {0x69}  /* Don't probe these addrs */
+#define CFG_I2C_OFFSET         0x3000
 
 /*
  * EEPROM configuration
@@ -233,8 +239,9 @@
 #define CONFIG_NET_MULTI
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 
-#undef CONFIG_EEPRO100
-#undef CONFIG_TULIP
+#define CONFIG_EEPRO100
+#define        CONFIG_E1000
+#undef CONFIG_TULIP
 
 #if !defined(CONFIG_PCI_PNP)
     #define PCI_ENET0_IOADDR   0xe0000000
@@ -256,17 +263,21 @@
 
 #define CONFIG_MII             1       /* MII PHY management */
 #define CONFIG_MPC85XX_TSEC1   1
+#define CONFIG_MPC85XX_TSEC1_NAME      "TSEC0"
 #define CONFIG_MPC85XX_TSEC2   1
+#define CONFIG_MPC85XX_TSEC2_NAME      "TSEC1"
 #define TSEC1_PHY_ADDR         0
 #define TSEC2_PHY_ADDR         1
 #define TSEC1_PHYIDX           0
 #define TSEC2_PHYIDX           0
 
 #define CONFIG_MPC85XX_FEC     1
+#define CONFIG_MPC85XX_FEC_NAME                "FEC"
 #define FEC_PHY_ADDR           3
 #define FEC_PHYIDX             0
 
-#define CONFIG_ETHPRIME                "ENET0"
+/* Options are: TSEC[0-1] */
+#define CONFIG_ETHPRIME                "TSEC0"
 
 #define        CONFIG_HAS_ETH1         1
 #define        CONFIG_HAS_ETH2         1
@@ -314,6 +325,7 @@
     #define  CONFIG_COMMANDS   (CONFIG_CMD_DFL         \
                                | CFG_CMD_EEPROM        \
                                | CFG_CMD_DATE          \
+                               | CFG_CMD_MII           \
                                | CFG_CMD_PCI           \
                                | CFG_CMD_PING          \
                                | CFG_CMD_I2C)
@@ -321,6 +333,7 @@
     #define  CONFIG_COMMANDS   (CONFIG_CMD_DFL         \
                                | CFG_CMD_EEPROM        \
                                | CFG_CMD_DATE          \
+                               | CFG_CMD_MII           \
                                | CFG_CMD_PING          \
                                | CFG_CMD_I2C)
   #endif