Merge with /home/hs/jupiter/u-boot

[oweals/u-boot.git] / include / configs / PLU405.h

diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index 7ee95df11f8d53e5913b330e8dfd7d973653cd80..d02c39b28f96b4b88271f873b05a367fb5c6857c 100644 (file)
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -51,17 +51,13 @@
 
 #define CFG_LOADS_BAUD_CHANGE  1       /* allow baudrate change        */
 
-#if 0 /* test-only */
 #define CONFIG_NET_MULTI       1
+#undef  CONFIG_HAS_ETH1
 
 #define CONFIG_MII             1       /* MII PHY management           */
 #define CONFIG_PHY_ADDR                0       /* PHY address                  */
-#define CONFIG_PHY1_ADDR       1       /* PHY address                  */
-#else
-#define CONFIG_MII             1       /* MII PHY management           */
-#define CONFIG_PHY_ADDR                0       /* PHY address                  */
-#endif
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R      1       /* use reset_phy() to disable phy sleep mode */
 
 #define CONFIG_PHY_CLK_FREQ    EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
 
@@ -160,6 +156,8 @@
  * NAND-FLASH stuff
  *-----------------------------------------------------------------------
  */
+#define CFG_NAND_LEGACY
+
 #define CFG_MAX_NAND_DEVICE    1       /* Max number of NAND devices           */
 #define SECTORSIZE 512
 
@@ -330,7 +328,7 @@
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
-#define CFG_DCACHE_SIZE                16384   /* For IBM 405 CPUs, older 405 ppc's    */
+#define CFG_DCACHE_SIZE                16384   /* For AMCC 405 CPUs, older 405 ppc's   */
                                        /* have only 8kB, 16kB is save here     */
 #define CFG_CACHELINE_SIZE     32      /* ...                  */
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)