powerpc/85xx: Rework MPC8569MDS pci_init_board to use common FSL PCIe code

[oweals/u-boot.git] / include / configs / MPC8569MDS.h

diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 92c2b49c1f58b298fc0301da9319891cbf3bc739..814c1754698adeb275ecf8f07d028bdad7a5f01e 100644 (file)
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2009 Freescale Semiconductor, Inc.
+ * Copyright (C) 2009-2010 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -51,7 +51,7 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CLK_FREQ    66666666
 #define CONFIG_DDR_CLK_FREQ    CONFIG_SYS_CLK_FREQ
 
-#ifdef CONFIG_MK_ATM
+#ifdef CONFIG_ATM
 #define CONFIG_PQ_MDS_PIB
 #define CONFIG_PQ_MDS_PIB_ATM
 #endif
@@ -62,10 +62,23 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_L2_CACHE                                /* toggle L2 cache      */
 #define CONFIG_BTB                             /* toggle branch predition */
 
-#ifdef CONFIG_MK_NAND
+#ifdef CONFIG_NAND
 #define CONFIG_NAND_U_BOOT             1
 #define CONFIG_RAMBOOT_NAND            1
-#define CONFIG_RAMBOOT_TEXT_BASE       0xf8f82000
+#ifdef CONFIG_NAND_SPL
+#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
+#else
+#define CONFIG_SYS_TEXT_BASE   0xf8f82000
+#endif
+#endif
+
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE   0xfff80000
+#endif
+
+#ifndef CONFIG_SYS_MONITOR_BASE
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE    /* start of monitor */
 #endif
 
 /*
@@ -74,6 +87,7 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_ENABLE_36BIT_PHYS       1
 
 #define CONFIG_BOARD_EARLY_INIT_F      1       /* Call board_pre_init */
+#define CONFIG_BOARD_EARLY_INIT_R      1
 #define CONFIG_HWCONFIG
 
 #define CONFIG_SYS_MEMTEST_START       0x00200000      /* memtest works on */
@@ -108,7 +122,6 @@ extern unsigned long get_clock_freq(void);
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#define CONFIG_DDR_DLL                 /* possible DLL fix needed */
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER      /* DDR controller or DMA? */
 
 #define CONFIG_MEM_INIT_VALUE  0xDeadBeef
@@ -189,10 +202,9 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
 
-#define CONFIG_SYS_MONITOR_BASE        TEXT_BASE       /* start of monitor */
-
-#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND)
+#if defined(CONFIG_RAMBOOT_NAND)
 #define CONFIG_SYS_RAMBOOT
+#define CONFIG_SYS_EXTRA_ENV_RELOC
 #else
 #undef CONFIG_SYS_RAMBOOT
 #endif
@@ -250,12 +262,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_OR3_PRELIM  CONFIG_NAND_OR_PRELIM /* NAND Options */
 #endif
 
-/*
- * SDRAM on the LocalBus
- */
-#define CONFIG_SYS_LBC_SDRAM_BASE      0xf0000000      /* Localbus SDRAM        */
-#define CONFIG_SYS_LBC_SDRAM_SIZE      64              /* LBC SDRAM is 64MB */
-
 #define CONFIG_SYS_LBC_LCRR    0x00000004      /* LB clock ratio reg */
 #define CONFIG_SYS_LBC_LBCR    0x00040000      /* LB config reg */
 #define CONFIG_SYS_LBC_LSRT    0x20000000      /* LB sdram refresh timer */
@@ -263,11 +269,10 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_SYS_INIT_RAM_LOCK       1
 #define CONFIG_SYS_INIT_RAM_ADDR       0xe4010000  /* Initial RAM address */
-#define CONFIG_SYS_INIT_RAM_END        0x4000      /* End of used area in RAM */
+#define CONFIG_SYS_INIT_RAM_SIZE       0x4000      /* Size of used area in RAM */
 
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* num bytes initial data */
 #define CONFIG_SYS_GBL_DATA_OFFSET     \
-                       (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+                       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)    /* Reserve 256 kB for Mon */
@@ -276,7 +281,6 @@ extern unsigned long get_clock_freq(void);
 /* Serial Port */
 #define CONFIG_CONS_INDEX              1
 #define CONFIG_SERIAL_MULTI            1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
@@ -341,6 +345,7 @@ extern unsigned long get_clock_freq(void);
  * General PCI
  * Memory Addresses are mapped 1-1. I/O is mapped from 0
  */
+#define CONFIG_SYS_PCIE1_NAME          "Slot"
 #define CONFIG_SYS_PCIE1_MEM_VIRT      0xa0000000
 #define CONFIG_SYS_PCIE1_MEM_BUS       0xa0000000
 #define CONFIG_SYS_PCIE1_MEM_PHYS      0xa0000000
@@ -363,7 +368,7 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_MIIM_ADDRESS    (CONFIG_SYS_CCSRBAR + 0x82120)
 #define CONFIG_UEC_ETH
-#define CONFIG_ETHPRIME         "FSL UEC0"
+#define CONFIG_ETHPRIME         "UEC0"
 #define CONFIG_PHY_MODE_NEED_CHANGE
 
 #define CONFIG_UEC_ETH1         /* GETH1 */
@@ -485,6 +490,7 @@ extern unsigned long get_clock_freq(void);
 
 #undef CONFIG_EEPRO100
 #undef CONFIG_TULIP
+#define CONFIG_E1000                   /* Define e1000 pci Ethernet card */
 
 #undef CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup */
 
@@ -506,8 +512,8 @@ extern unsigned long get_clock_freq(void);
 #else
 #define CONFIG_ENV_IS_IN_FLASH 1
 #define CONFIG_ENV_ADDR                (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SECT_SIZE   0x20000 /* 256K(one sector) for env */
-#define CONFIG_ENV_SIZE                CONFIG_ENV_SECT_SIZE
+#define CONFIG_ENV_SECT_SIZE   0x20000 /* 128K(one sector) for env */
+#define CONFIG_ENV_SIZE                0x2000
 #endif
 
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download */
@@ -549,6 +555,7 @@ extern unsigned long get_clock_freq(void);
 
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC
+#define CONFIG_FSL_ESDHC_PIN_MUX
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_CMD_MMC
 #define CONFIG_GENERIC_MMC
@@ -560,8 +567,9 @@ extern unsigned long get_clock_freq(void);
 /*
  * Miscellaneous configurable options
  */
-#define CONFIG_SYS_LONGHELP            /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING         /* Command-line editing */
+#define CONFIG_SYS_LONGHELP                    /* undef to save memory */
+#define CONFIG_CMDLINE_EDITING                 /* Command-line editing */
+#define CONFIG_AUTO_COMPLETE                   /* add autocompletion support */
 #define CONFIG_SYS_LOAD_ADDR   0x2000000       /* default load address */
 #define CONFIG_SYS_PROMPT      "=> "           /* Monitor Command Prompt */
 #if defined(CONFIG_CMD_KGDB)
@@ -584,14 +592,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_BOOTMAPSZ   (16 << 20)
                                        /* Initial Memory map for Linux*/
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD  0x01            /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM  0x02            /* Software reboot */
-
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */