Merge branch 'master' of git://git.denx.de/u-boot-usb

[oweals/u-boot.git] / include / configs / MPC8568MDS.h

diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index 281918bdc9ec7c1e6061bf2a90380f05f3d79230..f9c8dfbc248f79fabaa89e22f3e595f8c06c83ff 100644 (file)
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2004-2007 Freescale Semiconductor.
+ * Copyright 2004-2007, 2010-2011 Freescale Semiconductor.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -35,6 +35,9 @@
 
 #define        CONFIG_SYS_TEXT_BASE    0xfff80000
 
+#define CONFIG_SYS_SRIO
+#define CONFIG_SRIO1                   /* SRIO port 1 */
+
 #define CONFIG_PCI             1       /* Enable PCI/PCIE */
 #define CONFIG_PCI1            1       /* PCI controller */
 #define CONFIG_PCIE1           1       /* PCIE controller */
@@ -68,21 +71,14 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_MEMTEST_START       0x00200000      /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END         0x00400000
 
-/*
- * Base addresses -- Note these are effective addresses where the
- * actual resources get mapped (not physical addresses)
- */
-#define CONFIG_SYS_CCSRBAR_DEFAULT     0xff700000      /* CCSRBAR Default */
-#define CONFIG_SYS_CCSRBAR             0xe0000000      /* relocated CCSRBAR */
-#define CONFIG_SYS_CCSRBAR_PHYS        CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
-#define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
+#define CONFIG_SYS_CCSRBAR             0xe0000000
+#define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
 #define CONFIG_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#define CONFIG_DDR_DLL                 /* possible DLL fix needed */
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER      /* DDR controller or DMA? */
 
 #define CONFIG_MEM_INIT_VALUE  0xDeadBeef
@@ -294,6 +290,7 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_PCI1_IO_PHYS        0xe2000000
 #define CONFIG_SYS_PCI1_IO_SIZE        0x00800000      /* 8M */
 
+#define CONFIG_SYS_PCIE1_NAME          "Slot"
 #define CONFIG_SYS_PCIE1_MEM_VIRT      0xa0000000
 #define CONFIG_SYS_PCIE1_MEM_BUS       0xa0000000
 #define CONFIG_SYS_PCIE1_MEM_PHYS      0xa0000000
@@ -303,9 +300,10 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_PCIE1_IO_PHYS       0xe2800000
 #define CONFIG_SYS_PCIE1_IO_SIZE       0x00800000      /* 8M */
 
-#define CONFIG_SYS_SRIO_MEM_VIRT       0xc0000000
-#define CONFIG_SYS_SRIO_MEM_BUS        0xc0000000
-#define CONFIG_SYS_SRIO_MEM_PHYS       0xc0000000
+#define CONFIG_SYS_SRIO1_MEM_VIRT      0xC0000000
+#define CONFIG_SYS_SRIO1_MEM_BUS       0xC0000000
+#define CONFIG_SYS_SRIO1_MEM_PHYS      CONFIG_SYS_SRIO1_MEM_BUS
+#define CONFIG_SYS_SRIO1_MEM_SIZE      0x20000000      /* 512M */
 
 #ifdef CONFIG_QE
 /*
@@ -330,7 +328,7 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_UEC1_TX_CLK         QE_CLK16
 #define CONFIG_SYS_UEC1_ETH_TYPE       GIGA_ETH
 #define CONFIG_SYS_UEC1_PHY_ADDR       7
-#define CONFIG_SYS_UEC1_INTERFACE_TYPE RGMII_ID
+#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID
 #define CONFIG_SYS_UEC1_INTERFACE_SPEED 1000
 #endif
 
@@ -342,14 +340,13 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_UEC2_TX_CLK         QE_CLK16
 #define CONFIG_SYS_UEC2_ETH_TYPE       GIGA_ETH
 #define CONFIG_SYS_UEC2_PHY_ADDR       1
-#define CONFIG_SYS_UEC2_INTERFACE_TYPE RGMII_ID
+#define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID
 #define CONFIG_SYS_UEC2_INTERFACE_SPEED 1000
 #endif
 #endif /* CONFIG_QE */
 
 #if defined(CONFIG_PCI)
 
-#define CONFIG_NET_MULTI
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 
 #undef CONFIG_EEPRO100
@@ -360,10 +357,6 @@ extern unsigned long get_clock_freq(void);
 
 #endif /* CONFIG_PCI */
 
-#ifndef CONFIG_NET_MULTI
-#define CONFIG_NET_MULTI       1
-#endif
-
 #if defined(CONFIG_TSEC_ENET)
 
 #define CONFIG_MII             1       /* MII PHY management */
@@ -447,10 +440,11 @@ extern unsigned long get_clock_freq(void);
 
 /*
  * For booting Linux, the board info and command line data
- * have to be in the first 16 MB of memory, since this is
+ * have to be in the first 64 MB of memory, since this is
  * the maximum mapped by the Linux kernel during initialization.
  */
-#define CONFIG_SYS_BOOTMAPSZ   (16 << 20)      /* Initial Memory map for Linux*/
+#define CONFIG_SYS_BOOTMAPSZ   (64 << 20)      /* Initial Memory map for Linux*/
+#define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
@@ -476,8 +470,8 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_IPADDR    192.168.1.253
 
 #define CONFIG_HOSTNAME  unknown
-#define CONFIG_ROOTPATH  /nfsroot
-#define CONFIG_BOOTFILE  your.uImage
+#define CONFIG_ROOTPATH  "/nfsroot"
+#define CONFIG_BOOTFILE  "your.uImage"
 
 #define CONFIG_SERVERIP  192.168.1.1
 #define CONFIG_GATEWAYIP 192.168.1.1