Merge with git://www.denx.de/git/u-boot.git

[oweals/u-boot.git] / include / configs / MPC8544DS.h

diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 746f360f9e19b0be609056957af6bb5ec74b807c..f580ccadee5ea515ff5b911c348da1529834eca6 100644 (file)
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -181,6 +181,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CFG_BR3_PRELIM         0xf8100801      /* port size 8bit */
 #define CFG_OR3_PRELIM         0xfff06ff7      /* 1MB PIXIS area*/
 
+#define CONFIG_FSL_PIXIS       1       /* use common PIXIS code */
 #define PIXIS_BASE     0xf8100000      /* PIXIS registers */
 #define PIXIS_ID               0x0     /* Board ID at offset 0 */
 #define PIXIS_VER              0x1     /* Board version at offset 1 */
@@ -252,9 +253,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_OF_FLAT_TREE    1
 #define CONFIG_OF_BOARD_SETUP  1
 
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE  8192
-
 #define OF_CPU                 "PowerPC,8544@0"
 #define OF_SOC                 "soc8544@e0000000"
 #define OF_TBCLK               (bd->bi_busfreq / 8)
@@ -312,6 +310,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CFG_PCIE3_IO_BASE      0x00000000
 #define CFG_PCIE3_IO_PHYS      0xb0100000      /* reuse mem LAW */
 #define CFG_PCIE3_IO_SIZE      0x00100000      /* 1M */
+#define CFG_PCIE3_MEM_BASE2    0xb0200000
+#define CFG_PCIE3_MEM_PHYS2    CFG_PCIE3_MEM_BASE2
+#define CFG_PCIE3_MEM_SIZE2    0x00200000      /* 1M */
 
 #if defined(CONFIG_PCI)