sh: Fix compile error sh7763rdp board

[oweals/u-boot.git] / include / configs / MPC8544DS.h

diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 545a76cc62154c1050dcd70db70bbcb3b24f936d..669f4d7c8b9aedc1ac87f230ddfbd30235b19167 100644 (file)
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -42,6 +42,8 @@
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */
 #define CONFIG_FSL_PCIE_RESET  1       /* need PCIe reset errata */
 
+#define CONFIG_FSL_LAW         1       /* Use common FSL init code */
+
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
@@ -75,19 +77,14 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_L2_CACHE                        /* toggle L2 cache */
 #define CONFIG_BTB                     /* toggle branch predition */
 #define CONFIG_ADDR_STREAMING          /* toggle addr streaming */
-#define CONFIG_CLEAR_LAW0              /* Clear LAW0 in cpu_init_r */
 
 /*
  * Only possible on E500 Version 2 or newer cores.
  */
 #define CONFIG_ENABLE_36BIT_PHYS       1
 
-#define CONFIG_BOARD_EARLY_INIT_F      1       /* Call board_pre_init */
-
-#undef CFG_DRAM_TEST                   /* memory test, takes time */
 #define CFG_MEMTEST_START      0x00200000      /* memtest works on */
 #define CFG_MEMTEST_END                0x00400000
-#define CFG_ALT_MEMTEST
 #define CONFIG_PANIC_HANG      /* do not reset board on panic */
 
 /*
@@ -96,6 +93,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default */
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR */
 
 #define CFG_PCI1_ADDR          (CFG_CCSRBAR+0x8000)
@@ -162,11 +160,13 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CFG_FLASH_BANKS_LIST   {0xfe800000,CFG_FLASH_BASE}
 
+#define CFG_FLASH_QUIET_TEST
 #define CFG_MAX_FLASH_BANKS    2               /* number of banks */
 #define CFG_MAX_FLASH_SECT     128             /* sectors per device */
 #undef CFG_FLASH_CHECKSUM
 #define CFG_FLASH_ERASE_TOUT   60000           /* Flash Erase Timeout (ms) */
 #define CFG_FLASH_WRITE_TOUT   500             /* Flash Write Timeout (ms) */
+#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
 
 #define CFG_MONITOR_BASE       TEXT_BASE       /* start of monitor */
 
@@ -444,13 +444,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE                32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *