Remove fake flash bank from 8544 DS

[oweals/u-boot.git] / include / configs / MPC8544DS.h

diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index d5006b523679340ce9f303466421fc0f175ff01c..58b13578a3a075a143b0f7a0c07a6b6b330864c7 100644 (file)
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -77,15 +77,12 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_L2_CACHE                        /* toggle L2 cache */
 #define CONFIG_BTB                     /* toggle branch predition */
 #define CONFIG_ADDR_STREAMING          /* toggle addr streaming */
-#define CONFIG_CLEAR_LAW0              /* Clear LAW0 in cpu_init_r */
 
 /*
  * Only possible on E500 Version 2 or newer cores.
  */
 #define CONFIG_ENABLE_36BIT_PHYS       1
 
-#define CONFIG_BOARD_EARLY_INIT_F      1       /* Call board_pre_init */
-
 #define CFG_MEMTEST_START      0x00200000      /* memtest works on */
 #define CFG_MEMTEST_END                0x00400000
 #define CONFIG_PANIC_HANG      /* do not reset board on panic */
@@ -151,8 +148,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CFG_BOOT_BLOCK         0xfc000000      /* boot TLB */
 
-#define CFG_LBC_CACHE_BASE     0xf0000000      /* Localbus cacheable */
-
 #define CFG_FLASH_BASE         0xff800000      /* start of FLASH 8M */
 
 #define CFG_BR0_PRELIM         0xff801001
@@ -161,14 +156,15 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CFG_OR0_PRELIM         0xff806e65
 #define CFG_OR1_PRELIM         0xff806e65
 
-#define CFG_FLASH_BANKS_LIST   {0xfe800000,CFG_FLASH_BASE}
+#define CFG_FLASH_BANKS_LIST   {CFG_FLASH_BASE}
 
 #define CFG_FLASH_QUIET_TEST
-#define CFG_MAX_FLASH_BANKS    2               /* number of banks */
+#define CFG_MAX_FLASH_BANKS    1               /* number of banks */
 #define CFG_MAX_FLASH_SECT     128             /* sectors per device */
 #undef CFG_FLASH_CHECKSUM
 #define CFG_FLASH_ERASE_TOUT   60000           /* Flash Erase Timeout (ms) */
 #define CFG_FLASH_WRITE_TOUT   500             /* Flash Write Timeout (ms) */
+#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
 
 #define CFG_MONITOR_BASE       TEXT_BASE       /* start of monitor */
 
@@ -228,7 +224,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CFG_INIT_SP_OFFSET     CFG_GBL_DATA_OFFSET
 
 #define CFG_MONITOR_LEN                (256 * 1024) /* Reserve 256 kB for Mon */
-#define CFG_MALLOC_LEN         (128 * 1024)    /* Reserved for malloc */
+#define CFG_MALLOC_LEN         (1024 * 1024)   /* Reserved for malloc */
 
 /* Serial Port - controlled on board with jumper J8
  * open - index 2
@@ -316,6 +312,26 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #if defined(CONFIG_PCI)
 
+/*PCIE video card used*/
+#define VIDEO_IO_OFFSET                CFG_PCIE2_IO_PHYS
+
+/*PCI video card used*/
+/*#define VIDEO_IO_OFFSET      CFG_PCI1_IO_PHYS*/
+
+/* video */
+#define CONFIG_VIDEO
+
+#if defined(CONFIG_VIDEO)
+#define CONFIG_BIOSEMU
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VIDEO_SW_CURSOR
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_ATI_RADEON_FB
+#define CONFIG_VIDEO_LOGO
+/*#define CONFIG_CONSOLE_CURSOR*/
+#define CFG_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET
+#endif
+
 #define CONFIG_NET_MULTI
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 
@@ -384,7 +400,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #if CFG_MONITOR_BASE > 0xfff80000
 #define CFG_ENV_ADDR           0xfff80000
 #else
-#define CFG_ENV_ADDR           (CFG_MONITOR_BASE + 0x40000)
+#define CFG_ENV_ADDR           (CFG_MONITOR_BASE + 0x70000)
 #endif
 #define CFG_ENV_SIZE           0x2000
 #define CFG_ENV_SECT_SIZE      0x10000 /* 64K (one sector) */