Merge with /home/mk/11-cmb1920/u-boot#4upstream
[oweals/u-boot.git] / include / configs / MPC8541CDS.h
index 86bcfe324c84d4ca18ccab87e57033b4bbe83d5b..db389cfe676255598816e957c01205055548491f 100644 (file)
@@ -318,15 +318,19 @@ extern unsigned long get_clock_freq(void);
 #define OF_CPU                 "PowerPC,8541@0"
 #define OF_SOC                 "soc8541@e0000000"
 #define OF_TBCLK               (bd->bi_busfreq / 8)
-#define OF_STDOUT_PATH         "/soc8541@e0000000/serial@4500"
+#define OF_STDOUT_PATH         "/soc8541@e0000000/serial@4600"
 
-/* I2C */
-#define CONFIG_HARD_I2C                        /* I2C with hardware support */
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address */
 #define CFG_I2C_EEPROM_ADDR    0x57
 #define CFG_I2C_SLAVE          0x7F
 #define CFG_I2C_NOPROBES        {0x69} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET         0x3000
 
 /*
  * General PCI
@@ -335,32 +339,27 @@ extern unsigned long get_clock_freq(void);
 #define CFG_PCI1_MEM_BASE      0x80000000
 #define CFG_PCI1_MEM_PHYS      CFG_PCI1_MEM_BASE
 #define CFG_PCI1_MEM_SIZE      0x20000000      /* 512M */
-#define CFG_PCI1_IO_BASE       0xe2000000
-#define CFG_PCI1_IO_PHYS       CFG_PCI1_IO_BASE
-#define CFG_PCI1_IO_SIZE       0x1000000       /* 16M */
+#define CFG_PCI1_IO_BASE       0x00000000
+#define CFG_PCI1_IO_PHYS       0xe2000000
+#define CFG_PCI1_IO_SIZE       0x100000        /* 1M */
 
 #define CFG_PCI2_MEM_BASE      0xa0000000
 #define CFG_PCI2_MEM_PHYS      CFG_PCI2_MEM_BASE
 #define CFG_PCI2_MEM_SIZE      0x20000000      /* 512M */
-#define CFG_PCI2_IO_BASE       0xe3000000
-#define CFG_PCI2_IO_PHYS       CFG_PCI2_IO_BASE
-#define CFG_PCI2_IO_SIZE       0x1000000       /* 16M */
+#define CFG_PCI2_IO_BASE       0x00000000
+#define CFG_PCI2_IO_PHYS       0xe2100000
+#define CFG_PCI2_IO_SIZE       0x100000        /* 1M */
 
 
 #if defined(CONFIG_PCI)
 
+#define CONFIG_MPC85XX_PCI2
 #define CONFIG_NET_MULTI
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 
 #undef CONFIG_EEPRO100
 #undef CONFIG_TULIP
 
-#if !defined(CONFIG_PCI_PNP)
-    #define PCI_ENET0_IOADDR      0xe0000000
-    #define PCI_ENET0_MEMADDR     0xe0000000
-    #define PCI_IDSEL_NUMBER      0x0c         /*slot0->3(IDSEL)=12->15*/
-#endif
-
 #undef CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup */
 #define CFG_PCI_SUBSYS_VENDORID 0x1057  /* Motorola */
 
@@ -494,8 +493,10 @@ extern unsigned long get_clock_freq(void);
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \
    "netdev=eth0\0"                                                      \
    "consoledev=ttyS1\0"                                                 \
-   "ramdiskaddr=400000\0"                                               \
-   "ramdiskfile=your.ramdisk.u-boot\0"
+   "ramdiskaddr=600000\0"                                               \
+   "ramdiskfile=your.ramdisk.u-boot\0"                                 \
+   "fdtaddr=400000\0"                                                  \
+   "fdtfile=your.fdt.dtb\0"
 
 #define CONFIG_NFSBOOTCOMMAND                                          \
    "setenv bootargs root=/dev/nfs rw "                                  \
@@ -503,7 +504,8 @@ extern unsigned long get_clock_freq(void);
       "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
       "console=$consoledev,$baudrate $othbootargs;"                     \
    "tftp $loadaddr $bootfile;"                                          \
-   "bootm $loadaddr"
+   "tftp $fdtaddr $fdtfile;"                                           \
+   "bootm $loadaddr - $fdtaddr"
 
 #define CONFIG_RAMBOOTCOMMAND \
    "setenv bootargs root=/dev/ram rw "                                  \