microblaze: Add cache flush

[oweals/u-boot.git] / include / configs / MPC8541CDS.h

diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index eede26a66cedfb9b84f62ccc10694d468f524af2..399189c598e081016a9628782cb7cb000c8e90e6 100644 (file)
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -38,6 +38,7 @@
 #define CONFIG_MPC8541CDS      1       /* MPC8541CDS board specific */
 
 #define CONFIG_PCI
+#define CONFIG_SYS_PCI_64BIT   1       /* enable 64-bit PCI resources */
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
 
@@ -62,7 +63,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CONFIG_L2_CACHE                            /* toggle L2 cache  */
 #define CONFIG_BTB                         /* toggle branch predition */
-#define CONFIG_ADDR_STREAMING              /* toggle addr streaming   */
 
 #define CONFIG_SYS_MEMTEST_START       0x00200000      /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END         0x00400000
@@ -280,7 +280,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_BR3_PRELIM   0xf8000801
 #define CONFIG_SYS_OR3_PRELIM   0xfff00ff7
 
-#define CONFIG_L1_INIT_RAM
 #define CONFIG_SYS_INIT_RAM_LOCK       1
 #define CONFIG_SYS_INIT_RAM_ADDR       0xe4010000      /* Initial RAM address */
 #define CONFIG_SYS_INIT_RAM_END        0x4000      /* End of used area in RAM */