microblaze: Add cache flush

[oweals/u-boot.git] / include / configs / MPC8536DS.h

diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index fff888abc673b02496b211c4ee56aab94a4af2bc..532c3df7730f2b57964b3e78b25a4535dc066c62 100644 (file)
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -70,7 +70,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
  */
 #define CONFIG_L2_CACHE                        /* toggle L2 cache */
 #define CONFIG_BTB                     /* toggle branch predition */
-#define CONFIG_ADDR_STREAMING          /* toggle addr streaming */
 
 #define CONFIG_ENABLE_36BIT_PHYS       1
 
@@ -99,7 +98,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_DDR_SPD
 #undef CONFIG_DDR_DLL
 
-#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER       /* DDR controller or DMA? */
+#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER      /* DDR controller or DMA? */
 #define CONFIG_MEM_INIT_VALUE  0xDeadBeef
 
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
@@ -231,8 +230,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define PIXIS_VCLKL            0x1A    /* VELA VCLKL register */
 #define CONFIG_SYS_PIXIS_VBOOT_MASK    0xc0
 
-/* define to use L1 as initial stack */
-#define CONFIG_L1_INIT_RAM
 #define CONFIG_SYS_INIT_RAM_LOCK       1
 #define CONFIG_SYS_INIT_RAM_ADDR       0xffd00000      /* Initial L1 address */
 #define CONFIG_SYS_INIT_RAM_END        0x00004000      /* End of used area in RAM */