microblaze: Add cache flush

[oweals/u-boot.git] / include / configs / MPC837XEMDS.h

diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index e2f0942ce93a311d78c8678d2faf83c5a9113622..d49155fce09993762c3f6fff3190afb86d4d76d0 100644 (file)
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -204,7 +204,7 @@
 #endif
 
 /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
-#define CONFIG_SYS_MONITOR_LEN         (256 * 1024) /* Reserve 256 kB for Mon */
+#define CONFIG_SYS_MONITOR_LEN         (384 * 1024) /* Reserve 384 kB for Mon */
 #define CONFIG_SYS_MALLOC_LEN          (512 * 1024) /* Reserved for malloc */
 
 /*
@@ -268,6 +268,12 @@
 /*
  * NAND Flash on the Local Bus
  */
+#define CONFIG_CMD_NAND                1
+#define CONFIG_MTD_NAND_VERIFY_WRITE   1
+#define CONFIG_SYS_MAX_NAND_DEVICE     1
+#define NAND_MAX_CHIPS         1
+#define CONFIG_NAND_FSL_ELBC   1
+
 #define CONFIG_SYS_NAND_BASE           0xE0600000      /* 0xE0600000 */
 #define CONFIG_SYS_BR3_PRELIM          ( CONFIG_SYS_NAND_BASE \
                                | (2<<BR_DECC_SHIFT)    /* Use HW ECC */ \
@@ -275,13 +281,14 @@
                                | BR_MS_FCM             /* MSEL = FCM */ \
                                | BR_V )                /* valid */
 #define CONFIG_SYS_OR3_PRELIM          ( 0xFFFF8000            /* length 32K */ \
-                               | OR_FCM_CSCT \
+                               | OR_FCM_BCTLD \
                                | OR_FCM_CST \
                                | OR_FCM_CHT \
                                | OR_FCM_SCY_1 \
+                               | OR_FCM_RST \
                                | OR_FCM_TRLX \
                                | OR_FCM_EHTR )
-                               /* 0xFFFF8396 */
+                               /* 0xFFFF919E */
 
 #define CONFIG_SYS_LBLAWBAR3_PRELIM    CONFIG_SYS_NAND_BASE
 #define CONFIG_SYS_LBLAWAR3_PRELIM     0x8000000E      /* 32KB  */
@@ -348,9 +355,14 @@
 #define CONFIG_SYS_PCI_SLV_MEM_SIZE    0x80000000
 
 #ifdef CONFIG_PCI
+#ifndef __ASSEMBLY__
+extern int board_pci_host_broken(void);
+#endif
 #define CONFIG_83XX_GENERIC_PCI        1 /* Use generic PCI setup */
 #define CONFIG_PQ_MDS_PIB      1 /* PQ MDS Platform IO Board */
 
+#define CONFIG_HAS_FSL_DR_USB  1 /* fixup device tree for the DR USB */
+
 #define CONFIG_NET_MULTI
 #define CONFIG_PCI_PNP         /* do pci plug-and-play */