mpc83xx: Migrate CONFIG_LCRR_* to Kconfig

[oweals/u-boot.git] / include / configs / MPC8349ITX.h

diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 16d615dcc65fe44127c6de8d2dacd91290a5b0a8..6f040a3d6dc791c21a1f6d8afdace5d494d75d2c 100644 (file)
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -39,11 +39,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-/*
- * High Level Configuration Options
- */
-#define CONFIG_SYS_IMMR        0xE0000000      /* The IMMR is relocated to here */
-
 #define CONFIG_MISC_INIT_F
 
 /*
@@ -211,56 +206,19 @@ boards, we say we have two, but don't display a message if we find only one. */
  * BRx, ORx, LBLAWBARx, and LBLAWARx
  */
 
-/* Flash */
-
-#define CONFIG_SYS_BR0_PRELIM  (CONFIG_SYS_FLASH_BASE \
-                               | BR_PS_16 \
-                               | BR_MS_GPCM \
-                               | BR_V)
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
-                               | OR_UPM_XAM \
-                               | OR_GPCM_CSNT \
-                               | OR_GPCM_ACS_DIV2 \
-                               | OR_GPCM_XACS \
-                               | OR_GPCM_SCY_15 \
-                               | OR_GPCM_TRLX_SET \
-                               | OR_GPCM_EHTR_SET \
-                               | OR_GPCM_EAD)
+
 /* Vitesse 7385 */
 
 #define CONFIG_SYS_VSC7385_BASE        0xF8000000
 
 #ifdef CONFIG_VSC7385_ENET
 
-#define CONFIG_SYS_BR1_PRELIM  (CONFIG_SYS_VSC7385_BASE \
-                               | BR_PS_8 \
-                               | BR_MS_GPCM \
-                               | BR_V)
-#define CONFIG_SYS_OR1_PRELIM  (OR_AM_128KB \
-                               | OR_GPCM_CSNT \
-                               | OR_GPCM_XACS \
-                               | OR_GPCM_SCY_15 \
-                               | OR_GPCM_SETA \
-                               | OR_GPCM_TRLX_SET \
-                               | OR_GPCM_EHTR_SET \
-                               | OR_GPCM_EAD)
+
 #endif
 
-/* LED */
 
 #define CONFIG_SYS_LED_BASE    0xF9000000
-#define CONFIG_SYS_BR2_PRELIM  (CONFIG_SYS_LED_BASE \
-                               | BR_PS_8 \
-                               | BR_MS_GPCM \
-                               | BR_V)
-#define CONFIG_SYS_OR2_PRELIM  (OR_AM_2MB \
-                               | OR_GPCM_CSNT \
-                               | OR_GPCM_ACS_DIV2 \
-                               | OR_GPCM_XACS \
-                               | OR_GPCM_SCY_9 \
-                               | OR_GPCM_TRLX_SET \
-                               | OR_GPCM_EHTR_SET \
-                               | OR_GPCM_EAD)
+
 
 /* Compact Flash */
 
@@ -268,11 +226,6 @@ boards, we say we have two, but don't display a message if we find only one. */
 
 #define CONFIG_SYS_CF_BASE     0xF0000000
 
-#define CONFIG_SYS_BR3_PRELIM  (CONFIG_SYS_CF_BASE \
-                               | BR_PS_16 \
-                               | BR_MS_UPMA \
-                               | BR_V)
-#define CONFIG_SYS_OR3_PRELIM  (OR_UPM_AM | OR_UPM_BI)
 
 #endif
 
@@ -305,8 +258,6 @@ boards, we say we have two, but don't display a message if we find only one. */
  * External Local Bus rate is
  *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
  */
-#define CONFIG_SYS_LCRR_DBYP   LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR    0x00000000
 
                                /* LB sdram refresh timer, about 6us */
@@ -450,10 +401,6 @@ boards, we say we have two, but don't display a message if we find only one. */
 /*
  * System performance
  */
-#define CONFIG_SYS_ACR_PIPE_DEP        3       /* Arbiter pipeline depth (0-3) */
-#define CONFIG_SYS_ACR_RPTCNT  3       /* Arbiter repeat count (0-7) */
-#define CONFIG_SYS_SPCR_TSEC1EP        3       /* TSEC1 emergency priority (0-3) */
-#define CONFIG_SYS_SPCR_TSEC2EP        3       /* TSEC2 emergency priority (0-3) */
 #define CONFIG_SYS_SCCR_TSEC1CM        1       /* TSEC1 clock mode (0-3) */
 #define CONFIG_SYS_SCCR_TSEC2CM        1       /* TSEC2 & I2C0 clock mode (0-3) */
 #define CONFIG_SYS_SCCR_USBMPHCM 3     /* USB MPH controller's clock */
@@ -467,11 +414,6 @@ boards, we say we have two, but don't display a message if we find only one. */
                                /* USB DR as device + USB MPH as host */
 #define CONFIG_SYS_SICRL       (SICRL_LDP_A | SICRL_USB1)
 
-#define CONFIG_SYS_HID0_INIT   0x00000000
-#define CONFIG_SYS_HID0_FINAL  HID0_ENABLE_INSTRUCTION_CACHE
-
-#define CONFIG_SYS_HID2        HID2_HBE
-
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed of kgdb serial port */
 #endif