/*
- * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
+ * Copyright (C) Freescale Semiconductor, Inc. 2006.
*
* See file CREDITS for list of people who contributed to this
* project.
#define CONFIG_COMPACT_FLASH /* The CF card interface on the back of the board */
#define CONFIG_VSC7385_ENET /* VSC7385 ethernet support */
#define CONFIG_SATA_SIL3114 /* SIL3114 SATA controller */
+#define CONFIG_SYS_USB_HOST /* use the EHCI USB controller */
#endif
#define CONFIG_PCI
#endif
+#ifdef CONFIG_SYS_USB_HOST
+/*
+ * Support USB
+ */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_FSL
+
+/* Current USB implementation supports the only USB controller,
+ * so we have to choose between the MPH or the DR ones */
+#if 1
+#define CONFIG_HAS_FSL_MPH_USB
+#else
+#define CONFIG_HAS_FSL_DR_USB
+#endif
+
+#endif
+
/*
* DDR Setup
*/
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
-#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
+#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
/*
* External Local Bus rate is
* CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_4)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
#define CONFIG_SYS_LBC_LBCR 0x00000000
#define CONFIG_SYS_LBC_LSRT 0x32000000 /* LB sdram refresh timer, about 6us */
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_SDRAM
-#if defined(CONFIG_COMPACT_FLASH) || defined(CONFIG_SATA_SIL3114)
+#if defined(CONFIG_COMPACT_FLASH) || defined(CONFIG_SATA_SIL3114) \
+ || defined(CONFIG_USB_STORAGE)
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_FAT
+ #define CONFIG_SUPPORT_VFAT
#endif
#ifdef CONFIG_COMPACT_FLASH
#ifdef CONFIG_SATA_SIL3114
#define CONFIG_CMD_SATA
+#endif
+
+#if defined(CONFIG_SATA_SIL3114) || defined(CONFIG_USB_STORAGE)
#define CONFIG_CMD_EXT2
#endif
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
+#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
#ifdef CONFIG_MPC8349ITX
#define CONFIG_SYS_PROMPT "MPC8349E-mITX> " /* Monitor Command Prompt */
#define CONFIG_SYS_SPCR_TSEC2EP 3 /* TSEC2 emergency priority (0-3) */
#define CONFIG_SYS_SCCR_TSEC1CM 1 /* TSEC1 clock mode (0-3) */
#define CONFIG_SYS_SCCR_TSEC2CM 1 /* TSEC2 & I2C0 clock mode (0-3) */
+#define CONFIG_SYS_SCCR_USBMPHCM 3 /* USB MPH controller's clock */
+#define CONFIG_SYS_SCCR_USBDRCM 0 /* USB DR controller's clock */
/*
* System IO Config
*/
#define CONFIG_SYS_SICRH SICRH_TSOBI1 /* Needed for gigabit to work on TSEC 1 */
-#define CONFIG_SYS_SICRL (SICRL_LDP_A | SICRL_USB1)
+#define CONFIG_SYS_SICRL (SICRL_LDP_A | SICRL_USB1) /* USB DR as device + USB MPH as host */
#define CONFIG_SYS_HID0_INIT 0x000000000
#define CONFIG_SYS_HID0_FINAL CONFIG_SYS_HID0_INIT
*/
#define CONFIG_ENV_OVERWRITE
-#ifdef CONFIG_HAS_ETH0
-#define CONFIG_ETHADDR 00:E0:0C:00:8C:01
-#endif
-
-#ifdef CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 00:E0:0C:00:8C:02
-#endif
-
-#define CONFIG_IPADDR 192.168.1.253
-#define CONFIG_SERVERIP 192.168.1.1
-#define CONFIG_GATEWAYIP 192.168.1.1
-#define CONFIG_NETMASK 255.255.252.0
#define CONFIG_NETDEV eth0
#ifdef CONFIG_MPC8349ITX
#define CONFIG_FDTFILE mpc8349emitxgp.dtb
#endif
-#define CONFIG_BOOTDELAY 0
+#define CONFIG_BOOTDELAY 6
#define XMK_STR(x) #x
#define MK_STR(x) XMK_STR(x)
"cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
"protect on " MK_STR(TEXT_BASE) " +$filesize; " \
"cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
- "fdtaddr=400000\0" \
+ "fdtaddr=780000\0" \
"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0"
#define CONFIG_NFSBOOTCOMMAND \