MX51: vision2: Fix build for vision2 board.

[oweals/u-boot.git] / include / configs / MPC832XEMDS.h

diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index ade5b6dc0bbc61f7d2b2fef77693b0654923f795..f136a8e16a0832ed12d192292853e9c123b012cf 100644 (file)
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -153,8 +153,7 @@
 #define CONFIG_SYS_INIT_RAM_LOCK       1
 #define CONFIG_SYS_INIT_RAM_ADDR       0xE6000000      /* Initial RAM address */
 #define CONFIG_SYS_INIT_RAM_SIZE       0x1000          /* Size of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_SIZE       0x100           /* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 
 /*
  * Local Bus Configuration & Clock Setup
@@ -362,7 +361,7 @@
 #define CONFIG_SYS_UEC1_TX_CLK         QE_CLK10
 #define CONFIG_SYS_UEC1_ETH_TYPE       FAST_ETH
 #define CONFIG_SYS_UEC1_PHY_ADDR       3
-#define CONFIG_SYS_UEC1_INTERFACE_TYPE MII
+#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_MII
 #define CONFIG_SYS_UEC1_INTERFACE_SPEED        100
 #endif
 
@@ -374,7 +373,7 @@
 #define CONFIG_SYS_UEC2_TX_CLK         QE_CLK8
 #define CONFIG_SYS_UEC2_ETH_TYPE       FAST_ETH
 #define CONFIG_SYS_UEC2_PHY_ADDR       4
-#define CONFIG_SYS_UEC2_INTERFACE_TYPE MII
+#define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_MII
 #define CONFIG_SYS_UEC2_INTERFACE_SPEED        100
 #endif