* FLASH on the Local Bus
*/
#define CFG_FLASH_CFI /* use the Common Flash Interface */
-#define CFG_FLASH_CFI_DRIVER /* use the CFI driver */
+#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
#define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT
#define CFG_FLASH_BASE 0xFE000000 /* FLASH base address */
#define CFG_OR0_PRELIM ( (~(CFG_FLASH_SIZE - 1) << 20) \
| OR_UPM_XAM \
| OR_GPCM_CSNT \
- | OR_GPCM_ACS_0b11 \
+ | OR_GPCM_ACS_DIV2 \
| OR_GPCM_XACS \
| OR_GPCM_SCY_15 \
| OR_GPCM_TRLX \
#define CFG_PCI_MMIO_BASE 0x90000000
#define CFG_PCI_MMIO_PHYS CFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_SIZE 0x10000000 /* 256M */
-#define CFG_PCI_IO_BASE 0xE0300000
+#define CFG_PCI_IO_BASE 0x00000000
#define CFG_PCI_IO_PHYS 0xE0300000
#define CFG_PCI_IO_SIZE 0x100000 /* 1M */
/* Options are: eTSEC[0-1] */
#define CONFIG_ETHPRIME "eTSEC1"
+/*
+ * SATA
+ */
+#define CONFIG_LIBATA
+#define CONFIG_FSL_SATA
+
+#define CFG_SATA_MAX_DEVICE 2
+#define CONFIG_SATA1
+#define CFG_SATA1_OFFSET 0x18000
+#define CFG_SATA1 (CFG_IMMR + CFG_SATA1_OFFSET)
+#define CFG_SATA1_FLAGS FLAGS_DMA
+#define CONFIG_SATA2
+#define CFG_SATA2_OFFSET 0x19000
+#define CFG_SATA2 (CFG_IMMR + CFG_SATA2_OFFSET)
+#define CFG_SATA2_FLAGS FLAGS_DMA
+
+#ifdef CONFIG_FSL_SATA
+#define CONFIG_LBA48
+#define CONFIG_CMD_SATA
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_EXT2
+#endif
+
/*
* Environment
*/
/*
* MMU Setup
*/
+#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/* DDR: cache cacheable */
#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
#define CONFIG_BAUDRATE 115200
-#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */
+#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
#undef CONFIG_BOOTARGS /* the boot command will set bootargs */