ARMV7: OMAP3: Enable cache support on Overo

[oweals/u-boot.git] / include / configs / MIP405.h

diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index 7ac934225191bd82eee64e564fdc11169170e84c..bfff7504fc81e9087e0dd92b30fd949be2b6735e 100644 (file)
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -97,6 +97,7 @@
  ***************************************************************/
 
 #define CONFIG_HARD_I2C                        /* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
 #define CONFIG_SYS_I2C_SPEED           50000   /* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE           0x7F
 
@@ -175,6 +176,12 @@
 #define CONFIG_SYS_MEMTEST_START       0x0100000       /* memtest works on     */
 #define CONFIG_SYS_MEMTEST_END         0x0C00000       /* 1 ... 12 MB in DRAM  */
 
+#define CONFIG_CONS_INDEX      1       /* Use UART0                    */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE    1
+#define CONFIG_SYS_NS16550_CLK         get_serial_clock()
+
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK            /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD       916667
 
@@ -304,10 +311,6 @@
 /* reserve some memory for POST and BOOT limit info */
 #define CONFIG_SYS_INIT_SP_OFFSET      (CONFIG_SYS_GBL_DATA_OFFSET - 32)
 
-#ifdef  CONFIG_POST            /* reserve one word for POST Info */
-#define CONFIG_SYS_POST_WORD_ADDR      (CONFIG_SYS_GBL_DATA_OFFSET - 4)
-#endif
-
 #ifdef CONFIG_BOOTCOUNT_LIMIT /* reserve 2 word for bootcount limit */
 #define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 12)
 #endif