Merge branch '2020-05-07-more-kconfig-migrations'

[oweals/u-boot.git] / include / configs / M54418TWR.h

diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h
index a9d456c50b5a2dce35c73f0a3cd0a42accb4cb1c..cdf169f6a79a73d66a461588a183f30a3c0869ba 100644 (file)
--- a/include/configs/M54418TWR.h
+++ b/include/configs/M54418TWR.h
@@ -46,9 +46,7 @@
 #endif
 
 /* Network configuration */
-#define CONFIG_MCFFEC
 #ifdef CONFIG_MCFFEC
-#define CONFIG_MII                     1
 #define CONFIG_MII_INIT                1
 #define CONFIG_SYS_DISCOVER_PHY
 #define CONFIG_SYS_RX_ETH_BUFFER       2
@@ -56,14 +54,6 @@
 #define CONFIG_SYS_TX_ETH_BUFFER       2
 #define CONFIG_HAS_ETH1
 
-#define CONFIG_SYS_FEC0_PINMUX         0
-#define CONFIG_SYS_FEC0_MIIBASE        CONFIG_SYS_FEC0_IOBASE
-#define CONFIG_SYS_FEC1_PINMUX         0
-#define CONFIG_SYS_FEC1_MIIBASE        CONFIG_SYS_FEC0_MIIBASE
-#define MCFFEC_TOUT_LOOP               50000
-#define CONFIG_SYS_FEC0_PHYADDR        0
-#define CONFIG_SYS_FEC1_PHYADDR        1
-
 #define CONFIG_ETHPRIME        "FEC0"
 #define CONFIG_IPADDR          192.168.1.2
 #define CONFIG_NETMASK         255.255.255.0
@@ -138,7 +128,6 @@
 
 /* Timer */
 #define CONFIG_MCFTMR
-#undef CONFIG_MCFPIT
 
 /* I2c */
 #undef CONFIG_SYS_FSL_I2C
@@ -152,20 +141,7 @@
 /* DSPI and Serial Flash */
 #define CONFIG_CF_DSPI
 #define CONFIG_SERIAL_FLASH
-#define CONFIG_HARD_SPI
 #define CONFIG_SYS_SBFHDR_SIZE         0x7
-#ifdef CONFIG_CMD_SPI
-
-#      define CONFIG_SYS_DSPI_CTAR0    (DSPI_CTAR_TRSZ(7) | \
-                                        DSPI_CTAR_PCSSCK_1CLK | \
-                                        DSPI_CTAR_PASC(0) | \
-                                        DSPI_CTAR_PDT(0) | \
-                                        DSPI_CTAR_CSSCK(0) | \
-                                        DSPI_CTAR_ASC(0) | \
-                                        DSPI_CTAR_DT(1))
-#      define CONFIG_SYS_DSPI_CTAR1    (CONFIG_SYS_DSPI_CTAR0)
-#      define CONFIG_SYS_DSPI_CTAR2    (CONFIG_SYS_DSPI_CTAR0)
-#endif
 
 /* Input, PCI, Flexbus, and VCO */
 #define CONFIG_EXTRA_CLOCK
@@ -202,8 +178,6 @@
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
 #define CONFIG_SYS_SDRAM_SIZE          128     /* SDRAM size in MB */
 
-#define CONFIG_SYS_MEMTEST_START       (CONFIG_SYS_SDRAM_BASE + 0x400)
-#define CONFIG_SYS_MEMTEST_END         ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
 #define CONFIG_SYS_DRAM_TEST
 
 #if defined(CONFIG_CF_SBF) || defined(CONFIG_SYS_NAND_BOOT)
@@ -234,31 +208,14 @@
 /* Configuration for environment
  * Environment is embedded in u-boot in the second sector of the flash
  */
-#if !defined(CONFIG_SERIAL_BOOT)  /*MRAM boot*/
-#define CONFIG_ENV_ADDR                (0x40000 - 0x1000) /*MRAM size 40000*/
-#define CONFIG_ENV_SIZE                0x1000
-#endif
 
-#if defined(CONFIG_CF_SBF)
-#define CONFIG_ENV_SPI_CS              1
-#define CONFIG_ENV_OFFSET              0x40000
-#define CONFIG_ENV_SIZE                0x2000
-#define CONFIG_ENV_SECT_SIZE           0x10000
-#endif
-#if defined(CONFIG_SYS_NAND_BOOT)
-#define CONFIG_ENV_OFFSET      0x80000
-#define CONFIG_ENV_SIZE        0x20000
-#define CONFIG_ENV_SECT_SIZE   0x20000
-#endif
 #undef CONFIG_ENV_OVERWRITE
 
 /* FLASH organization */
 #define CONFIG_SYS_FLASH_BASE          CONFIG_SYS_CS0_BASE
 
-#undef CONFIG_SYS_FLASH_CFI
 #ifdef CONFIG_SYS_FLASH_CFI
 
-#define CONFIG_FLASH_CFI_DRIVER        1
 /* Max size that the board might have */
 #define CONFIG_SYS_FLASH_SIZE          0x1000000
 #define CONFIG_SYS_FLASH_CFI_WIDTH     FLASH_CFI_16BIT
@@ -267,7 +224,6 @@
 /* max number of sectors on one chip */
 #define CONFIG_SYS_MAX_FLASH_SECT      270
 /* "Real" (hardware) sectors protection */
-#define CONFIG_SYS_FLASH_PROTECTION
 #define CONFIG_SYS_FLASH_CHECKSUM
 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_CS0_BASE }
 #else