Merge branch 'at91' of git://git.denx.de/u-boot-atmel

[oweals/u-boot.git] / include / configs / M5272C3.h

diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index 779d373a5438261e94d50a649ce304dda4fef274..f704bb3ff7c6ba8f82ef36160f47f31aca5f85fc 100644 (file)
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -55,7 +55,6 @@
 #define CONFIG_ENV_OFFSET              0x4000
 #define CONFIG_ENV_SECT_SIZE   0x2000
 #define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_IS_EMBEDDED 1
 #else
 #define CONFIG_ENV_ADDR                0xffe04000
 #define CONFIG_ENV_SECT_SIZE   0x2000
@@ -75,6 +74,7 @@
  */
 #include <config_cmd_default.h>
 
+#define CONFIG_CMD_CACHE
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_PING
@@ -194,18 +194,37 @@
  */
 #define CONFIG_SYS_BOOTMAPSZ           (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
 
-/*-----------------------------------------------------------------------
+/*
  * FLASH organization
  */
-#define CONFIG_SYS_MAX_FLASH_BANKS     1       /* max number of memory banks           */
-#define CONFIG_SYS_MAX_FLASH_SECT      11      /* max number of sectors on one chip    */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    1000
+#define CONFIG_SYS_FLASH_CFI
+#ifdef CONFIG_SYS_FLASH_CFI
+#      define CONFIG_FLASH_CFI_DRIVER  1
+#      define CONFIG_SYS_FLASH_SIZE            0x800000        /* Max size that the board might have */
+#      define CONFIG_SYS_FLASH_CFI_WIDTH       FLASH_CFI_16BIT
+#      define CONFIG_SYS_MAX_FLASH_BANKS       1       /* max number of memory banks */
+#      define CONFIG_SYS_MAX_FLASH_SECT        137     /* max number of sectors on one chip */
+#      define CONFIG_SYS_FLASH_PROTECTION      /* "Real" (hardware) sectors protection */
+#endif
 
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
 #define CONFIG_SYS_CACHELINE_SIZE      16
 
+#define ICACHE_STATUS                  (CONFIG_SYS_INIT_RAM_ADDR + \
+                                        CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS                  (CONFIG_SYS_INIT_RAM_ADDR + \
+                                        CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV          (CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0          (CONFIG_SYS_SDRAM_BASE | \
+                                        CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+                                        CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR         (CF_CACR_CENB | CF_CACR_CINV | \
+                                        CF_CACR_DISD | CF_CACR_INVI | \
+                                        CF_CACR_CEIB | CF_CACR_DCM | \
+                                        CF_CACR_EUSP)
+
 /*-----------------------------------------------------------------------
  * Memory bank definitions
  */