Support for redundant environment in NAND Flash.
[oweals/u-boot.git] / include / configs / JSE.h
index 4dd7d89e9af8bfc38df6a46ce955b5d39208e901..ccd1f19903b40ed3871c9998dfb9ce97515c6055 100644 (file)
 #define CONFIG_PHY_ADDR                1       /* PHY address                  */
 
 #define CONFIG_COMMANDS               (CONFIG_CMD_DFL  | \
-                               CFG_CMD_PCI     | \
-                               CFG_CMD_IRQ     | \
-                               CFG_CMD_FLASH   | \
-                               CFG_CMD_NET     | \
                                CFG_CMD_DHCP    | \
-                               CFG_CMD_PING    | \
-                               CFG_CMD_MII     | \
                                CFG_CMD_EEPROM  | \
+                               CFG_CMD_ELF     | \
                                CFG_CMD_FAT     | \
-                               CFG_CMD_ELF     )
+                               CFG_CMD_FLASH   | \
+                               CFG_CMD_IRQ     | \
+                               CFG_CMD_MII     | \
+                               CFG_CMD_NET     | \
+                               CFG_CMD_PCI     | \
+                               CFG_CMD_PING    )
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>
   /* watchdog disabled */
 #undef CONFIG_WATCHDOG
   /* SPD EEPROM (sdram speed config) disabled */
-#undef CONFIG_SPD_EEPRO
+#undef CONFIG_SPD_EEPROM
 #undef SPD_EEPROM_ADDRESS
 
 /*
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
-#define CFG_DCACHE_SIZE                16384   /* For IBM 405GPr CPUs  */
+#define CFG_DCACHE_SIZE                16384   /* For AMCC 405GPr CPUs */
 #define CFG_CACHELINE_SIZE     32      /* ...                  */
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 #define CFG_CACHELINE_SHIFT    5       /* log base 2 of the above value */