Enable address translation on MPC83xx

[oweals/u-boot.git] / include / configs / HH405.h

diff --git a/include/configs/HH405.h b/include/configs/HH405.h
index 9ce6b3f8914a4f810fd251a12f01585546e99168..131c21555d3e674fefddb0ccf6556611e56e9555 100644 (file)
--- a/include/configs/HH405.h
+++ b/include/configs/HH405.h
@@ -55,6 +55,10 @@
 
 #define CONFIG_PREBOOT         "autoupd"
 
+#define        CONFIG_EXTRA_ENV_SETTINGS                                       \
+       "pciconfighost=1\0"                                             \
+       ""
+
 #define CFG_LOADS_BAUD_CHANGE  1       /* allow baudrate change        */
 
 #define CONFIG_MII             1       /* MII PHY management           */
@@ -66,7 +70,9 @@
 /*
  * Video console
  */
-#define CONFIG_VIDEO
+#define CONFIG_VIDEO                   /* for sm501 video support      */
+
+#ifdef CONFIG_VIDEO
 #define CONFIG_VIDEO_SM501
 #if 0
 #define CONFIG_VIDEO_SM501_32BPP
@@ -82,13 +88,12 @@
 #define CFG_CONSOLE_IS_IN_ENV
 #define CONFIG_SPLASH_SCREEN
 #define CONFIG_VIDEO_BMP_GZIP          /* gzip compressed bmp images   */
-#define CFG_VIDEO_LOGO_MAX_SIZE        (1024*1024)     /* for decompressed img */
+#define CFG_VIDEO_LOGO_MAX_SIZE        (2 << 20)       /* for decompressed img */
 
-#ifdef CONFIG_VIDEO
 #define ADD_BMP_CMD            CFG_CMD_BMP
 #else
 #define ADD_BMP_CMD            0
-#endif
+#endif /* CONFIG_VIDEO */
 
 #define CONFIG_COMMANDS              ( CONFIG_CMD_DFL  | \
                                CFG_CMD_DHCP    | \
@@ -303,7 +308,7 @@
 #define CFG_FLASH_BASE         0xFFF80000
 #define CFG_MONITOR_BASE       TEXT_BASE
 #define CFG_MONITOR_LEN                (512 * 1024)    /* Reserve 512 kB for Monitor   */
-#define CFG_MALLOC_LEN         (2 * 1024*1024) /* Reserve 2 MB for malloc()    */
+#define CFG_MALLOC_LEN         (4 << 20)       /* Reserve 4 MB for malloc()    */
 
 #if (CFG_MONITOR_BASE < FLASH_BASE0_PRELIM)
 # define CFG_RAMBOOT           1
@@ -359,7 +364,7 @@
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
-#define CFG_DCACHE_SIZE                16384   /* For IBM 405 CPUs, older 405 ppc's    */
+#define CFG_DCACHE_SIZE                16384   /* For AMCC 405 CPUs, older 405 ppc's    */
                                        /* have only 8kB, 16kB is save here     */
 #define CFG_CACHELINE_SIZE     32      /* ...                  */
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
@@ -404,8 +409,6 @@
 #define CFG_LCD_SMALL_MEM       0xF1400000  /* Epson S1D13704 Mem Base Address  */
 #define CFG_LCD_SMALL_REG       0xF140FFE0  /* Epson S1D13704 Reg Base Address  */
 
-#define CFG_LCD_LOGO_MAX_SIZE   (1024*1024)
-
 /*-----------------------------------------------------------------------
  * Universal Interrupt Controller (UIC) Setup
  */