rename CFG_ENV_IS_IN_EEPROM in CONFIG_ENV_IS_IN_EEPROM

[oweals/u-boot.git] / include / configs / FADS850SAR.h

diff --git a/include/configs/FADS850SAR.h b/include/configs/FADS850SAR.h
index a1041769ef69b9d881577d148f1a57c42003e575..356705ba1fda5cf92bc87418370dd451e286ac7e 100644 (file)
--- a/include/configs/FADS850SAR.h
+++ b/include/configs/FADS850SAR.h
@@ -30,8 +30,6 @@
  * High Level Configuration Options
  * (easy to change)
  */
-#include <mpc8xx_irq.h>
-
 #define CONFIG_MPC850          1
 #define CONFIG_MPC850SAR       1
 #define CONFIG_FADS                    1
@@ -63,15 +61,28 @@
 
 #undef CONFIG_WATCHDOG                 /* watchdog disabled            */
 
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
 
 /*
  * Miscellaneous configurable options
  */
 #undef CFG_LONGHELP                    /* undef to save memory         */
 #define        CFG_PROMPT              ":>"            /* Monitor Command Prompt       */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define        CFG_CBSIZE      1024            /* Console I/O Buffer Size      */
 #else
 #define        CFG_CBSIZE      256             /* Console I/O Buffer Size      */
@@ -116,6 +127,7 @@
  * Also NOTE that it doesn't mean SDRAM - it means MEMORY.
  */
 #define        CFG_SDRAM_BASE          0x00000000
+#define        CFG_SDRAM_SIZE          (4<<20) /* standard FADS has 4M */
 #define CFG_FLASH_BASE         0x02800000
 #define CFG_FLASH_SIZE         ((uint)(8 * 1024 * 1024))       /* max 8Mbyte */
 #if 0
@@ -144,12 +156,13 @@
 #define        CFG_ENV_IS_IN_FLASH     1
 #define CFG_ENV_OFFSET         0x00040000      /* Offset of Environment Sector */
 #define        CFG_ENV_SIZE            0x40000 /* Total Size of Environment Sector     */
+#define        CFG_USE_PPCENV                  /* Environment embedded in sect .ppcenv */
 
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
 #define CFG_CACHELINE_SIZE     16      /* For all MPC8xx CPUs                  */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CACHELINE_SHIFT    4       /* log base 2 of the above value        */
 #endif
 
@@ -334,8 +347,9 @@
 #define BCSR1_PCCVCC1            ((uint)0x00010000)
 
 #define BCSR2_FLASH_PD_MASK      ((uint)0xF0000000)
+#define BCSR2_FLASH_PD_SHIFT    28
 #define BCSR2_DRAM_PD_MASK       ((uint)0x07800000)
-#define BCSR2_DRAM_PD_SHIFT      (23)
+#define BCSR2_DRAM_PD_SHIFT      23
 #define BCSR2_EXTTOLI_MASK       ((uint)0x00780000)
 #define BCSR2_DBREVNR_MASK       ((uint)0x00030000)
 
@@ -392,22 +406,10 @@
 #define CONFIG_DRAM_50MHZ              1
 #define CONFIG_SDRAM_50MHZ
 
-#ifdef CONFIG_MPC860T
-
-/* Interrupt level assignments.
-*/
-#define FEC_INTERRUPT  SIU_LEVEL1      /* FEC interrupt */
-
-#endif /* CONFIG_MPC860T */
-
 /* We don't use the 8259.
 */
 #define NR_8259_INTS   0
 
-/* Machine type
-*/
-#define _MACH_8xx (_MACH_fads)
-
 #define CONFIG_DISK_SPINUP_TIME 1000000
 
 
@@ -419,4 +421,6 @@
 #define PCMCIA_SLOT_A 1
 #endif
 
+#define CFG_DAUGHTERBOARD
+
 #endif /* __CONFIG_H */