Socrates: config file cleanup.

[oweals/u-boot.git] / include / configs / DU440.h

diff --git a/include/configs/DU440.h b/include/configs/DU440.h
index 4fb6921eadebfb03aa8d835da9ab93abd1533a8b..0f5f85c22a66cd1351132c4478c9ef08b428e511 100644 (file)
--- a/include/configs/DU440.h
+++ b/include/configs/DU440.h
@@ -157,10 +157,9 @@
  */
 #define CFG_MBYTES_SDRAM        (1024) /* 512 MiB      TODO: remove    */
 #define CONFIG_DDR_DATA_EYE            /* use DDR2 optimization        */
+#define CFG_MEM_TOP_HIDE        (4 << 10) /* don't use last 4kbytes     */
+                                       /* 440EPx errata CHIP 11        */
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for setup     */
-#if 0
-#define CONFIG_ZERO_SDRAM              /* Zero SDRAM after setup       */
-#endif
 #define CONFIG_DDR_ECC                 /* Use ECC when available       */
 #define SPD_EEPROM_ADDRESS     {0x50}
 #define CONFIG_PROG_SDRAM_TLB
@@ -244,9 +243,6 @@
        "update=protect off FFFA0000 FFFFFFFF;era FFFA0000 FFFFFFFF;"   \
                "cp.b 100000 FFFA0000 60000\0"                          \
        ""
-#if 0
-#define CONFIG_BOOTCOMMAND     "run flash_self"
-#endif
 
 #define CONFIG_PREBOOT                  /* enable preboot variable      */
 
@@ -264,7 +260,7 @@ int du440_phy_addr(int devnum);
 #define CONFIG_PHY_ADDR                du440_phy_addr(0) /* PHY address        */
 
 #define CONFIG_PHY_RESET        1      /* reset phy upon startup       */
-#define CONFIG_PHY_GIGE                1       /* Include GbE detection        */
+#undef CONFIG_PHY_GIGE                 /* no GbE detection             */
 
 #define CONFIG_HAS_ETH0
 #define CFG_RX_ETH_BUFFER      128
@@ -295,7 +291,9 @@ int du440_phy_addr(int devnum);
 
 #include <config_cmd_default.h>
 
+#define CONFIG_CMD_AUTOSCRIPT
 #define CONFIG_CMD_BSP
+#define CONFIG_CMD_BMP
 #define CONFIG_CMD_DATE
 #define CONFIG_CMD_ASKENV
 #define CONFIG_CMD_DHCP
@@ -377,11 +375,11 @@ int du440_phy_addr(int devnum);
 #define CFG_FLASH              CFG_FLASH_BASE
 
 #define CFG_CPLD_BASE          0xC0000000
-#define CFG_CPLD_RANGE                 0x00000010
+#define CFG_CPLD_RANGE         0x00000010
 #define CFG_DUMEM_BASE         0xC0100000
-#define CFG_DUMEM_RANGE        0x00100000
+#define CFG_DUMEM_RANGE                0x00100000
 #define CFG_DUIO_BASE          0xC0200000
-#define CFG_DUIO_RANGE                 0x00010000
+#define CFG_DUIO_RANGE         0x00010000
 
 #define CFG_NAND0_CS           2               /* NAND chip connected to CSx */
 #define CFG_NAND1_CS           3               /* NAND chip connected to CSx */
@@ -431,8 +429,6 @@ int du440_phy_addr(int devnum);
 #define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
 #endif
 
-#if 0
-#define CONFIG_SHOW_ACTIVITY      1
-#endif
+#define CONFIG_AUTOSCRIPT      1
 
 #endif /* __CONFIG_H */