Enable address translation on MPC83xx

[oweals/u-boot.git] / include / configs / DP405.h

diff --git a/include/configs/DP405.h b/include/configs/DP405.h
index 666a0d0ff836549e6c6480aab02c11f302cee239..2ae794dc26ca1bd11095df0dff8e6959229f9574 100644 (file)
--- a/include/configs/DP405.h
+++ b/include/configs/DP405.h
@@ -40,23 +40,16 @@
 #define CONFIG_BOARD_EARLY_INIT_F 1    /* call board_early_init_f()    */
 #define CONFIG_MISC_INIT_R     1       /* call misc_init_r()           */
 
-#define CONFIG_SYS_CLK_FREQ    33333334 /* external frequency to pll   */
+#define CONFIG_SYS_CLK_FREQ    33333300 /* external frequency to pll   */
 
 #define CONFIG_BAUDRATE                9600
 #define CONFIG_BOOTDELAY       3       /* autoboot after 3 seconds     */
 
 #undef CONFIG_BOOTARGS
-#define CONFIG_RAMBOOTCOMMAND                                                  \
-       "setenv bootargs root=/dev/ram rw nfsroot=$(serverip):$(rootpath) "     \
-       "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;"    \
-       "bootm ffc00000 ffca0000"
-#define CONFIG_NFSBOOTCOMMAND                                                  \
-       "setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) "     \
-       "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;"    \
-       "bootm ffc00000"
-#define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
-
-#define CONFIG_LOADS_ECHO      1       /* echo on for serial download  */
+#undef  CONFIG_BOOTCOMMAND
+
+#define CONFIG_PREBOOT                  /* enable preboot variable      */
+
 #define CFG_LOADS_BAUD_CHANGE  1       /* allow baudrate change        */
 
 #define CONFIG_MII             1       /* MII PHY management           */
@@ -81,6 +74,8 @@
 
 #define CONFIG_SDRAM_BANK0     1       /* init onboard SDRAM bank 0    */
 
+#define CONFIG_PRAM            2       /* reserve 2 kB "protected RAM" */
+
 /*
  * Miscellaneous configurable options
  */
@@ -237,7 +232,7 @@
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
-#define CFG_DCACHE_SIZE                16384   /* For IBM 405 CPUs, older 405 ppc's    */
+#define CFG_DCACHE_SIZE                16384   /* For AMCC 405 CPUs, older 405 ppc's   */
                                        /* have only 8kB, 16kB is save here     */
 #define CFG_CACHELINE_SIZE     32      /* ...                  */
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)