ppc4xx: Fix APC405 board support

[oweals/u-boot.git] / include / configs / DB64460.h

diff --git a/include/configs/DB64460.h b/include/configs/DB64460.h
index 604fd45af7d9957351297cbff1a5a99a9258ea7f..765eaaf0fb59b98074e8516df6b015ed1a577e1d 100644 (file)
--- a/include/configs/DB64460.h
+++ b/include/configs/DB64460.h
@@ -168,7 +168,7 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0"
  *
  */
 /* No command line, one static partition, whole device */
-#undef CONFIG_JFFS2_CMDLINE
+#undef CONFIG_CMD_MTDPARTS
 #define CONFIG_JFFS2_DEV               "nor1"
 #define CONFIG_JFFS2_PART_SIZE         0xFFFFFFFF
 #define CONFIG_JFFS2_PART_OFFSET       0x00000000
@@ -180,7 +180,7 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0"
  * Note: fake mtd_id's used, no linux mtd map file.
  */
 /*
-#define CONFIG_JFFS2_CMDLINE
+#define CONFIG_CMD_MTDPARTS
 #define MTDIDS_DEFAULT         "nor1=db64460-1"
 #define MTDPARTS_DEFAULT       "mtdparts=db64460-1:-(jffs2)"
 */
@@ -256,8 +256,7 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0"
 
 #define CONFIG_SYS_HZ                  1000            /* decr freq: 1ms ticks */
 /*ronen - this the Sys clock (cpu bus,internal dram and SDRAM) */
-#define CONFIG_SYS_BUS_HZ              133000000       /* 133 MHz (CPU = 5*Bus = 666MHz)               */
-#define CONFIG_SYS_BUS_CLK             CONFIG_SYS_BUS_HZ
+#define CONFIG_SYS_BUS_CLK             133000000       /* 133 MHz (CPU = 5*Bus = 666MHz)               */
 
 #define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP 7 /* define the SDRAM cycle count */
 #define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP 50 /* for 200MHZ -> 5.0 ns, 166MHZ -> 6.0, 133MHZ -> 7.50 ns */