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FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
[oweals/u-boot.git]
/
include
/
asm-ppc
/
processor.h
diff --git
a/include/asm-ppc/processor.h
b/include/asm-ppc/processor.h
index b2148444a1fdf042560f5f1198977ac7366a1635..dce4717f427df7cb36044c669888c5d2d66a0cef 100644
(file)
--- a/
include/asm-ppc/processor.h
+++ b/
include/asm-ppc/processor.h
@@
-859,6
+859,8
@@
#define PVR_86xx 0x80040000
#define PVR_86xx_REV1 (PVR_86xx | 0x0010)
+#define PVR_VIRTEX5 0x7ff21912
+
/*
* For the 8xx processors, all of them report the same PVR family for
* the PowerPC core. The various versions of these processors must be