Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx

[oweals/u-boot.git] / include / asm-ppc / processor.h

diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index aec325b470aba707984e1841b80c09a046151299..10fd478baba6a91dda629b6d6d1544b0e7d96f40 100644 (file)
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -460,17 +460,19 @@
 #define SPRN_PID2      0x27a   /* Process ID Register 2 */
 #define SPRN_MCSR      0x23c   /* Machine Check Syndrome register */
 #define SPRN_MCAR      0x23d   /* Machine Check Address register */
-#ifdef CONFIG_440
 #define MCSR_MCS       0x80000000      /* Machine Check Summary */
 #define MCSR_IB                0x40000000      /* Instruction PLB Error */
+#if defined(CONFIG_440)
 #define MCSR_DRB       0x20000000      /* Data Read PLB Error */
 #define MCSR_DWB       0x10000000      /* Data Write PLB Error */
+#else
+#define MCSR_DB                0x20000000      /* Data PLB Error */
+#endif /* defined(CONFIG_440) */
 #define MCSR_TLBP      0x08000000      /* TLB Parity Error */
 #define MCSR_ICP       0x04000000      /* I-Cache Parity Error */
 #define MCSR_DCSP      0x02000000      /* D-Cache Search Parity Error */
 #define MCSR_DCFP      0x01000000      /* D-Cache Flush Parity Error */
 #define MCSR_IMPE      0x00800000      /* Imprecise Machine Check Exception */
-#endif
 #define ESR_ST         0x00800000      /* Store Operation */
 
 #if defined(CONFIG_MPC86xx)
@@ -772,10 +774,14 @@
 #define PVR_405EP_RA   0x51210950
 #define PVR_405GPR_RB  0x50910951
 #define PVR_405EZ_RA   0x41511460
-#define PVR_405EXR1_RA 0x12911473 /* 405EXr rev A with Security */
-#define PVR_405EXR2_RA 0x12911471 /* 405EXr rev A without Security */
-#define PVR_405EX1_RA  0x12911477 /* 405EX rev A with Security */
-#define PVR_405EX2_RA  0x12911475 /* 405EX rev A without Security */
+#define PVR_405EXR1_RA 0x12911473 /* 405EXr rev A/B with Security */
+#define PVR_405EXR2_RA 0x12911471 /* 405EXr rev A/B without Security */
+#define PVR_405EX1_RA  0x12911477 /* 405EX rev A/B with Security */
+#define PVR_405EX2_RA  0x12911475 /* 405EX rev A/B without Security */
+#define PVR_405EXR1_RC 0x1291147B /* 405EXr rev C with Security */
+#define PVR_405EXR2_RC 0x12911479 /* 405EXr rev C without Security */
+#define PVR_405EX1_RC  0x1291147F /* 405EX rev C with Security */
+#define PVR_405EX2_RC  0x1291147D /* 405EX rev C without Security */
 #define PVR_440GP_RB   0x40120440
 #define PVR_440GP_RC   0x40120481
 #define PVR_440EP_RA   0x42221850
@@ -911,55 +917,6 @@
 #define SVR_8641       0x809000
 #define SVR_8641D      0x809001
 
-/* I am just adding a single entry for 8260 boards.  I think we may be
- * able to combine mbx, fads, rpxlite, bseip, and classic into a single
- * generic 8xx as well.  The boards containing these processors are either
- * identical at the processor level (due to the high integration) or so
- * wildly different that testing _machine at run time is best replaced by
- * conditional compilation by board type (found in their respective .h file).
- *     -- Dan
- */
-#define _MACH_prep     0x00000001
-#define _MACH_Pmac     0x00000002      /* pmac or pmac clone (non-chrp) */
-#define _MACH_chrp     0x00000004      /* chrp machine */
-#define _MACH_mbx      0x00000008      /* Motorola MBX board */
-#define _MACH_apus     0x00000010      /* amiga with phase5 powerup */
-#define _MACH_fads     0x00000020      /* Motorola FADS board */
-#define _MACH_rpxlite  0x00000040      /* RPCG RPX-Lite 8xx board */
-#define _MACH_bseip    0x00000080      /* Bright Star Engineering ip-Engine */
-#define _MACH_yk       0x00000100      /* Motorola Yellowknife */
-#define _MACH_gemini   0x00000200      /* Synergy Microsystems gemini board */
-#define _MACH_classic  0x00000400      /* RPCG RPX-Classic 8xx board */
-#define _MACH_oak      0x00000800      /* IBM "Oak" 403 eval. board */
-#define _MACH_walnut   0x00001000      /* AMCC "Walnut" 405GP eval. board */
-#define _MACH_8260     0x00002000      /* Generic 8260 */
-#define _MACH_sandpoint 0x00004000     /* Motorola SPS Processor eval board */
-#define _MACH_tqm860   0x00008000      /* TQM860/L */
-#define _MACH_tqm8xxL  0x00010000      /* TQM8xxL */
-#define _MACH_hidden_dragon 0x00020000 /* Motorola Hidden Dragon eval board */
-
-/* see residual.h for these */
-#define _PREP_Motorola 0x01  /* motorola prep */
-#define _PREP_Firm     0x02  /* firmworks prep */
-#define _PREP_IBM      0x00  /* ibm prep */
-#define _PREP_Bull     0x03  /* bull prep */
-#define _PREP_Radstone 0x04  /* Radstone Technology PLC prep */
-
-/*
- * Radstone board types
- */
-#define RS_SYS_TYPE_PPC1   0
-#define RS_SYS_TYPE_PPC2   1
-#define RS_SYS_TYPE_PPC1a  2
-#define RS_SYS_TYPE_PPC2a  3
-#define RS_SYS_TYPE_PPC4   4
-#define RS_SYS_TYPE_PPC4a  5
-#define RS_SYS_TYPE_PPC2ep 6
-
-/* these are arbitrary */
-#define _CHRP_Motorola 0x04  /* motorola chrp, the cobra */
-#define _CHRP_IBM      0x05  /* IBM chrp, the longtrail and longtrail 2 */
-
 #define _GLOBAL(n)\
        .globl n;\
 n:
@@ -1005,6 +962,24 @@ n:
 #define SR15   15
 
 #ifndef __ASSEMBLY__
+
+struct cpu_type {
+       char name[15];
+       u32 soc_ver;
+};
+
+struct cpu_type *identify_cpu(u32 ver);
+
+#if defined(CONFIG_MPC85xx)
+#define CPU_TYPE_ENTRY(n, v) \
+       { .name = #n, .soc_ver = SVR_##v, }
+#else
+#if defined(CONFIG_MPC83XX)
+#define CPU_TYPE_ENTRY(x) {#x, SPR_##x}
+#endif
+#endif
+
+
 #ifndef CONFIG_MACH_SPECIFIC
 extern int _machine;
 extern int have_of;