Merge branch 'master' of git://git.denx.de/u-boot-nand-flash

[oweals/u-boot.git] / include / asm-ppc / immap_qe.h

diff --git a/include/asm-ppc/immap_qe.h b/include/asm-ppc/immap_qe.h
index a16a6d3fc5fb29ddbce9495a5c411a6e86fe3c05..531cfc891d74e13e8b147c7e69ff3f41681b3b89 100644 (file)
--- a/include/asm-ppc/immap_qe.h
+++ b/include/asm-ppc/immap_qe.h
@@ -3,7 +3,7 @@
  * The Internal Memory Map for devices with QE on them. This
  * is the superset of all QE devices (8360, etc.).
  *
- * Copyright (c) 2006 Freescale Semiconductor, Inc.
+ * Copyright (c) 2006-2009 Freescale Semiconductor, Inc.
  * Author: Shlomi Gridih <gridish@freescale.com>
  *
  * This program is free software; you can redistribute  it and/or modify it
@@ -20,7 +20,9 @@
 typedef struct qe_iram {
        u32 iadd;               /* I-RAM Address Register */
        u32 idata;              /* I-RAM Data Register    */
-       u8 res0[0x78];
+       u8 res0[0x4];
+       u32 iready;
+       u8 res1[0x70];
 } __attribute__ ((packed)) qe_iram_t;
 
 /* QE Interrupt Controller
@@ -513,10 +515,39 @@ typedef struct dbg {
        u8 res2[0x48];
 } __attribute__ ((packed)) dbg_t;
 
-/* RISC Special Registers (Trap and Breakpoint)
+/*
+ * RISC Special Registers (Trap and Breakpoint).  These are described in
+ * the QE Developer's Handbook.
 */
 typedef struct rsp {
-       u8 fixme[0x100];
+       u32 tibcr[16];  /* Trap/instruction breakpoint control regs */
+       u8 res0[64];
+       u32 ibcr0;
+       u32 ibs0;
+       u32 ibcnr0;
+       u8 res1[4];
+       u32 ibcr1;
+       u32 ibs1;
+       u32 ibcnr1;
+       u32 npcr;
+       u32 dbcr;
+       u32 dbar;
+       u32 dbamr;
+       u32 dbsr;
+       u32 dbcnr;
+       u8 res2[12];
+       u32 dbdr_h;
+       u32 dbdr_l;
+       u32 dbdmr_h;
+       u32 dbdmr_l;
+       u32 bsr;
+       u32 bor;
+       u32 bior;
+       u8 res3[4];
+       u32 iatr[4];
+       u32 eccr;               /* Exception control configuration register */
+       u32 eicr;
+       u8 res4[0x100-0xf8];
 } __attribute__ ((packed)) rsp_t;
 
 typedef struct qe_immap {
@@ -554,6 +585,9 @@ typedef struct qe_immap {
 #if defined(CONFIG_MPC8568)
        u8 muram[0x10000];      /* 0x1_0000 -  0x2_0000 Multi-user RAM */
        u8 res17[0x20000];      /* 0x2_0000 -  0x4_0000 */
+#elif defined(CONFIG_MPC8569)
+       u8 muram[0x20000];      /* 0x1_0000 -  0x3_0000 Multi-user RAM */
+       u8 res17[0x10000];      /* 0x3_0000 -  0x4_0000 */
 #else
        u8 muram[0xC000];       /* 0x110000 -  0x11C000 Multi-user RAM */
        u8 res17[0x24000];      /* 0x11C000 -  0x140000 */
@@ -565,10 +599,23 @@ extern qe_map_t *qe_immr;
 
 #if defined(CONFIG_MPC8568)
 #define QE_MURAM_SIZE          0x10000UL
+#elif defined(CONFIG_MPC8569)
+#define QE_MURAM_SIZE          0x20000UL
 #elif defined(CONFIG_MPC8360)
 #define QE_MURAM_SIZE          0xc000UL
-#elif defined(CONFIG_MPC832X)
+#elif defined(CONFIG_MPC832x)
 #define QE_MURAM_SIZE          0x4000UL
 #endif
 
+#if defined(CONFIG_MPC8323)
+#define MAX_QE_RISC     1
+#define QE_NUM_OF_SNUM 28
+#elif defined(CONFIG_MPC8569)
+#define MAX_QE_RISC     4
+#define QE_NUM_OF_SNUM 46
+#else
+#define MAX_QE_RISC    2
+#define QE_NUM_OF_SNUM 28
+#endif
+
 #endif                         /* __IMMAP_QE_H__ */