ppc/85xx: Clean up immap_85xx.h

[oweals/u-boot.git] / include / asm-ppc / immap_512x.h

diff --git a/include/asm-ppc/immap_512x.h b/include/asm-ppc/immap_512x.h
index 444e0288855720cde54ac647fb63d367a91eb568..79cdd80298f9fb1de907905103316ac1d9ff1509 100644 (file)
--- a/include/asm-ppc/immap_512x.h
+++ b/include/asm-ppc/immap_512x.h
@@ -185,10 +185,11 @@ typedef struct clk512x {
        u8 res0[4];
        u32 bcr;                /* Bread Crumb Register */
        u32 pscccr[12];         /* PSC0-11 Clock Control Registers */
-       u32 spccr;              /* SPDIF Clock Control Registers */
-       u32 cccr;               /* CFM Clock Control Registers */
-       u32 dccr;               /* DIU Clock Control Registers */
-       u8 res1[0xa8];
+       u32 spccr;              /* SPDIF Clock Control Register */
+       u32 cccr;               /* CFM Clock Control Register */
+       u32 dccr;               /* DIU Clock Control Register */
+       u32 msccr[4];           /* MSCAN1-4 Clock Control Registers */
+       u8 res1[0x98];
 } clk512x_t;
 
 /* SPMR - System PLL Mode Register */
@@ -234,6 +235,9 @@ typedef struct clk512x {
 #define SCFR1_PCI_DIV_MASK     0x00700000
 #define SCFR1_PCI_DIV_SHIFT    20
 
+#define SCFR1_LPC_DIV_MASK     0x00003800
+#define SCFR1_LPC_DIV_SHIFT    11
+
 /* SCFR2 System Clock Frequency Register 2 */
 #define SCFR2_SYS_DIV          0xFC000000
 #define SCFR2_SYS_DIV_SHIFT    26
@@ -337,6 +341,10 @@ typedef struct ddr512x {
        u32 res2[0x3AD];
 } ddr512x_t;
 
+/* MDDRC SYS CFG and Timing CFG0 Registers */
+#define MDDRC_SYS_CFG_EN       0xF0000000
+#define MDDRC_SYS_CFG_CMD_MASK 0x10000000
+#define MDDRC_REFRESH_ZERO_MASK        0x0000FFFF
 
 /*
  * DMA/Messaging Unit