* Add support for IceCube board (with MGT5100 and MPC5200 CPUs)

[oweals/u-boot.git] / include / asm-ppc / cpm_8260.h

diff --git a/include/asm-ppc/cpm_8260.h b/include/asm-ppc/cpm_8260.h
index 21451809b431c34e4c5bcc1bfeced47ece0b99c2..5c70603f48565bdd077b6e56f817c6a4228082e9 100644 (file)
--- a/include/asm-ppc/cpm_8260.h
+++ b/include/asm-ppc/cpm_8260.h
@@ -136,7 +136,11 @@ typedef struct cpm_buf_desc {
 
 /* Parameter RAM offsets from the base.
 */
+#ifndef CFG_CPM_POST_WORD_ADDR
 #define CPM_POST_WORD_ADDR      0x80FC /* steal a long at the end of SCC1 */
+#else
+#define CPM_POST_WORD_ADDR     CFG_CPM_POST_WORD_ADDR
+#endif
 #define PROFF_SCC1             ((uint)0x8000)
 #define PROFF_SCC2             ((uint)0x8100)
 #define PROFF_SCC3             ((uint)0x8200)
@@ -166,7 +170,7 @@ typedef struct cpm_buf_desc {
  */
 #define PROFF_SMC1     (0)
 #define PROFF_SMC2     (64)
-
+#define PROFF_SPI      ((16*1024) - 128)
 
 /* Define enough so I can at least use the serial port as a UART.
  */
@@ -733,6 +737,17 @@ typedef struct spi {
 #define SPMODE_LEN(x)  ((((x)-1)&0xF)<<4)
 #define SPMODE_PM(x)   ((x) &0xF)
 
+/* SPI Event/Mask register.
+*/
+#define SPI_EMASK              0x37    /* Event Mask                           */
+#define SPI_MME                        0x20    /* Multi-Master Error                   */
+#define SPI_TXE                        0x10    /* Transmit Error                       */
+#define SPI_BSY                        0x04    /* Busy                                 */
+#define SPI_TXB                        0x02    /* Tx Buffer Empty                      */
+#define SPI_RXB                        0x01    /* RX Buffer full/closed                */
+
+#define SPI_STR                        0x80    /* SPCOM: Start transmit                */
+
 #define SPI_EB         ((u_char)0x10)          /* big endian byte order */
 
 #define BD_IIC_START           ((ushort)0x0400)