Merge branch 'katmai-ddr-gda'

[oweals/u-boot.git] / include / asm-ppc / 4xx_pcie.h

diff --git a/include/asm-ppc/4xx_pcie.h b/include/asm-ppc/4xx_pcie.h
index 1bb8fc7ed13d403dd0d567ff26281f9144d33328..4c03b050fef28d689f8fe4089cd983d76e8e2fb2 100644 (file)
--- a/include/asm-ppc/4xx_pcie.h
+++ b/include/asm-ppc/4xx_pcie.h
@@ -16,14 +16,29 @@
 #define DCRN_SDR0_CFGDATA      0x00f
 
 #if defined(CONFIG_440SPE)
+#define CFG_PCIE_NR_PORTS      3
+
+#define CFG_PCIE_ADDR_HIGH     0x0000000d
+
 #define DCRN_PCIE0_BASE                0x100
 #define DCRN_PCIE1_BASE                0x120
 #define DCRN_PCIE2_BASE                0x140
+
+#define PCIE0_SDR              0x300
+#define PCIE1_SDR              0x340
+#define PCIE2_SDR              0x370
 #endif
 
 #if defined(CONFIG_405EX)
+#define CFG_PCIE_NR_PORTS      2
+
+#define CFG_PCIE_ADDR_HIGH     0x00000000
+
 #define        DCRN_PCIE0_BASE         0x040
 #define        DCRN_PCIE1_BASE         0x060
+
+#define PCIE0_SDR              0x400
+#define PCIE1_SDR              0x440
 #endif
 
 #define PCIE0                  DCRN_PCIE0_BASE
@@ -53,17 +68,6 @@
 #define PESDR0_PLLLCT2         0x03a1
 #define PESDR0_PLLLCT3         0x03a2
 
-#if defined(CONFIG_440SPE)
-#define PCIE0_SDR              0x300
-#define PCIE1_SDR              0x340
-#define PCIE2_SDR              0x370
-#endif
-
-#if defined(CONFIG_405EX)
-#define PCIE0_SDR              0x400
-#define PCIE1_SDR              0x440
-#endif
-
 /* common regs, at least for 405EX and 440SPe */
 #define SDRN_PESDR_UTLSET1(n)          (sdr_base(n) + 0x00)
 #define SDRN_PESDR_UTLSET2(n)          (sdr_base(n) + 0x01)
@@ -199,6 +203,7 @@
 /*
  * UTL register offsets
  */
+#define        PEUTL_PBCTL             0x00
 #define PEUTL_PBBSZ            0x20
 #define PEUTL_OPDBSZ           0x68
 #define PEUTL_IPHBSZ           0x70
@@ -206,6 +211,7 @@
 #define PEUTL_OUTTR            0x90
 #define PEUTL_INTR             0x98
 #define PEUTL_PCTL             0xa0
+#define        PEUTL_RCSTA             0xb0
 #define PEUTL_RCIRQEN          0xb8
 
 /*
@@ -214,7 +220,8 @@
 #define PECFG_BAR0LMPA         0x210
 #define PECFG_BAR0HMPA         0x214
 #define PECFG_BAR1MPA          0x218
-#define PECFG_BAR2MPA          0x220
+#define PECFG_BAR2LMPA         0x220
+#define PECFG_BAR2HMPA         0x224
 
 #define PECFG_PIMEN            0x33c
 #define PECFG_PIM0LAL          0x340
@@ -237,6 +244,12 @@
 
 #define GPL_DMER_MASK_DISA     0x02000000
 
+#define U64_TO_U32_LOW(val)    ((u32)((val) & 0x00000000ffffffffULL))
+#define U64_TO_U32_HIGH(val)   ((u32)((val) >> 32))
+
+/*
+ * Prototypes
+ */
 int ppc4xx_init_pcie(void);
 int ppc4xx_init_pcie_rootport(int port);
 int ppc4xx_init_pcie_endport(int port);
@@ -244,6 +257,59 @@ void ppc4xx_setup_pcie_rootpoint(struct pci_controller *hose, int port);
 int ppc4xx_setup_pcie_endpoint(struct pci_controller *hose, int port);
 int pcie_hose_scan(struct pci_controller *hose, int bus);
 
+/*
+ * Function to determine root port or endport from env variable.
+ */
+static inline int is_end_point(int port)
+{
+       char s[10], *tk;
+       char *pcie_mode = getenv("pcie_mode");
+
+       if (pcie_mode == NULL)
+               return 0;
+
+       strcpy(s, pcie_mode);
+       tk = strtok(s, ":");
+
+       switch (port) {
+       case 0:
+               if (tk != NULL) {
+                       if (!(strcmp(tk, "ep") && strcmp(tk, "EP")))
+                               return 1;
+                       else
+                               return 0;
+               }
+               else
+                       return 0;
+
+       case 1:
+               tk = strtok(NULL, ":");
+               if (tk != NULL) {
+                       if (!(strcmp(tk, "ep") && strcmp(tk, "EP")))
+                               return 1;
+                       else
+                               return 0;
+               }
+               else
+                       return 0;
+
+       case 2:
+               tk = strtok(NULL, ":");
+               if (tk != NULL)
+                       tk = strtok(NULL, ":");
+               if (tk != NULL) {
+                       if (!(strcmp(tk, "ep") && strcmp(tk, "EP")))
+                               return 1;
+                       else
+                               return 0;
+               }
+               else
+                       return 0;
+       }
+
+       return 0;
+}
+
 static inline void mdelay(int n)
 {
        u32 ms = n;
@@ -260,7 +326,7 @@ static inline u32 sdr_base(int port)
                return PCIE0_SDR;
        case 1:
                return PCIE1_SDR;
-#if defined(PCIE2_SDR)
+#if CFG_PCIE_NR_PORTS > 2
        case 2:
                return PCIE2_SDR;
 #endif