/* FSL macros */
#define NGET(val, fslnum) \
__asm__ __volatile__ ("nget %0, rfsl" #fslnum :"=r" (val));
+
#define GET(val, fslnum) \
__asm__ __volatile__ ("get %0, rfsl" #fslnum :"=r" (val));
+
+#define NCGET(val, fslnum) \
+ __asm__ __volatile__ ("ncget %0, rfsl" #fslnum :"=r" (val));
+
+#define CGET(val, fslnum) \
+ __asm__ __volatile__ ("cget %0, rfsl" #fslnum :"=r" (val));
+
#define NPUT(val, fslnum) \
__asm__ __volatile__ ("nput %0, rfsl" #fslnum ::"r" (val));
+
#define PUT(val, fslnum) \
__asm__ __volatile__ ("put %0, rfsl" #fslnum ::"r" (val));
+#define NCPUT(val, fslnum) \
+ __asm__ __volatile__ ("ncput %0, rfsl" #fslnum ::"r" (val));
+
+#define CPUT(val, fslnum) \
+ __asm__ __volatile__ ("cput %0, rfsl" #fslnum ::"r" (val));
+
/* CPU dependent */
-#define MFS(val) \
- __asm__ __volatile__ ("mfs %0, rmsr":"=r" (val));
+/* machine status register */
+#define MFS(val, reg) \
+ __asm__ __volatile__ ("mfs %0," #reg :"=r" (val));
-#define MTS(val) \
- __asm__ __volatile__ ("mts rmsr, %0"::"r" (val));
+#define MTS(val, reg) \
+ __asm__ __volatile__ ("mts " #reg ", %0"::"r" (val));
/* get return address from interrupt */
#define R14(val) \
__asm__ __volatile__ ("addi %0, r14, 0":"=r" (val));
+#define NOP __asm__ __volatile__ ("nop");
+
/* use machine status registe USE_MSR_REG */
#ifdef XILINX_USE_MSR_INSTR
#define MSRSET(val) \
{ \
register unsigned tmp; \
__asm__ __volatile__ (" \
- mfs %0, rmsr; \
+ mfs %0, rmsr; \
ori %0, %0, "#val"; \
mts rmsr, %0; \
nop;" \
{ \
register unsigned tmp; \
__asm__ __volatile__ (" \
- mfs %0, rmsr; \
+ mfs %0, rmsr; \
andi %0, %0, ~"#val"; \
mts rmsr, %0; \
nop;" \