ppc4xx: Update Kilauea to use PPC4xx DDR autocalibration routines

[oweals/u-boot.git] / include / asm-microblaze / asm.h

diff --git a/include/asm-microblaze/asm.h b/include/asm-microblaze/asm.h
old mode 100755 (executable)
new mode 100644 (file)
index 8302ed8..deb23e0
--- a/include/asm-microblaze/asm.h
+++ b/include/asm-microblaze/asm.h
@@ -49,23 +49,18 @@
 
 /* CPU dependent */
 /* machine status register */
-#define MFS(val) \
-       __asm__ __volatile__ ("mfs %0, rmsr":"=r" (val));
+#define MFS(val, reg) \
+       __asm__ __volatile__ ("mfs %0," #reg :"=r" (val));
 
-#define MTS(val) \
-       __asm__ __volatile__ ("mts rmsr, %0"::"r" (val));
-
-/* exception status register */
-#define MFSEAR(val) \
-       __asm__ __volatile ("mfs %0,rear":"=r" (val));
-
-#define MFSESR(val) \
-       __asm__ __volatile ("mfs %0,resr":"=r" (val));
+#define MTS(val, reg) \
+       __asm__ __volatile__ ("mts " #reg ", %0"::"r" (val));
 
 /* get return address from interrupt */
 #define R14(val) \
        __asm__ __volatile__ ("addi %0, r14, 0":"=r" (val));
 
+#define NOP    __asm__ __volatile__ ("nop");
+
 /* use machine status registe USE_MSR_REG */
 #ifdef XILINX_USE_MSR_INSTR
 #define MSRSET(val) \
@@ -79,7 +74,7 @@
 {                                                              \
        register unsigned tmp;                                  \
        __asm__ __volatile__ ("                                 \
-                       mfs     %0, rmsr;                       \
+                       mfs     %0, rmsr;                       \
                        ori     %0, %0, "#val";                 \
                        mts     rmsr, %0;                       \
                        nop;"                                   \
@@ -92,7 +87,7 @@
 {                                                              \
        register unsigned tmp;                                  \
        __asm__ __volatile__ ("                                 \
-                       mfs     %0, rmsr;                       \
+                       mfs     %0, rmsr;                       \
                        andi    %0, %0, ~"#val";                \
                        mts     rmsr, %0;                       \
                        nop;"                                   \