Merge branch 'master' of git://git.denx.de/u-boot-cfi-flash

[oweals/u-boot.git] / include / asm-arm / io.h

diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index c2b69fb2dd92ac1d1ddc5ded23dc820c45e45a91..fec3a7eace50ce220355e03bdd5629eed23be80a 100644 (file)
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -29,6 +29,39 @@
 #include <asm/arch/hardware.h>
 #endif /* XXX###XXX */
 
+static inline void sync(void)
+{
+}
+
+/*
+ * Given a physical address and a length, return a virtual address
+ * that can be used to access the memory range with the caching
+ * properties specified by "flags".
+ */
+#define MAP_NOCACHE    (0)
+#define MAP_WRCOMBINE  (0)
+#define MAP_WRBACK     (0)
+#define MAP_WRTHROUGH  (0)
+
+static inline void *
+map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
+{
+       return (void *)paddr;
+}
+
+/*
+ * Take down a mapping set up by map_physmem().
+ */
+static inline void unmap_physmem(void *vaddr, unsigned long flags)
+{
+
+}
+
+static inline phys_addr_t virt_to_phys(void * vaddr)
+{
+       return (phys_addr_t)(vaddr);
+}
+
 /*
  * Generic virtual read/write.  Note that we don't support half-word
  * read/writes.  We define __arch_*[bl] here, and leave __arch_*w
@@ -58,6 +91,14 @@ extern void __raw_readsl(unsigned int addr, void *data, int longlen);
 #define __raw_readw(a)                 __arch_getw(a)
 #define __raw_readl(a)                 __arch_getl(a)
 
+#define writeb(v,a)                    __arch_putb(v,a)
+#define writew(v,a)                    __arch_putw(v,a)
+#define writel(v,a)                    __arch_putl(v,a)
+
+#define readb(a)                       __arch_getb(a)
+#define readw(a)                       __arch_getw(a)
+#define readl(a)                       __arch_getl(a)
+
 /*
  * The compiler seems to be incapable of optimising constants
  * properly.  Spell it out to the compiler in some cases.
@@ -87,7 +128,7 @@ extern void __raw_readsl(unsigned int addr, void *data, int longlen);
  * only.  Their primary purpose is to access PCI and ISA peripherals.
  *
  * Note that for a big endian machine, this implies that the following
- * big endian mode connectivity is in place, as described by numerious
+ * big endian mode connectivity is in place, as described by numerous
  * ARM documents:
  *
  *    PCI:  D0-D7   D8-D15 D16-D23 D24-D31