watchdog: sp805_wdt: get platform clock from dt file

[oweals/u-boot.git] / drivers / watchdog / sp805_wdt.c

diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c
index ca3ccbe76cbad1ea35b8d74ee9d94eab6e303da3..65fd2384f125404e92005df0898a7c40260816cf 100644 (file)
--- a/drivers/watchdog/sp805_wdt.c
+++ b/drivers/watchdog/sp805_wdt.c
@@ -7,6 +7,7 @@
 
 #include <asm/io.h>
 #include <common.h>
+#include <clk.h>
 #include <dm/device.h>
 #include <dm/fdtaddr.h>
 #include <dm/read.h>
@@ -34,6 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 struct sp805_wdt_priv {
        void __iomem *reg;
+       unsigned long clk_rate;
 };
 
 static int sp805_wdt_reset(struct udevice *dev)
@@ -63,8 +65,13 @@ static int sp805_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
         * set 120s, the gd->bus_clk is less than 1145MHz, the load_value will
         * not overflow.
         */
-       load_value = (gd->bus_clk) /
-               (2 * 1000 * SYS_FSL_WDT_CLK_DIV) * load_time;
+       if (gd->bus_clk) {
+               load_value = (gd->bus_clk) /
+                       (2 * 1000 * SYS_FSL_WDT_CLK_DIV) * load_time;
+       } else {
+               /* platform provide clk */
+               load_value = (timeout / 2) * (priv->clk_rate / 1000);
+       }
 
        writel(UNLOCK, priv->reg + WDTLOCK);
        writel(load_value, priv->reg + WDTLOAD);
@@ -105,11 +112,15 @@ static int sp805_wdt_probe(struct udevice *dev)
 static int sp805_wdt_ofdata_to_platdata(struct udevice *dev)
 {
        struct sp805_wdt_priv *priv = dev_get_priv(dev);
+       struct clk clk;
 
        priv->reg = (void __iomem *)dev_read_addr(dev);
        if (IS_ERR(priv->reg))
                return PTR_ERR(priv->reg);
 
+       if (!clk_get_by_index(dev, 0, &clk))
+               priv->clk_rate = clk_get_rate(&clk);
+
        return 0;
 }