+// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2004
* Pierre Aubert, Staubli Faverges , <p.aubert@staubli.com>
* Copyright 2011 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/************************************************************************
#include <common.h>
#include <edid.h>
+#include <env.h>
#include <errno.h>
#include <linux/ctype.h>
EDID_DETAILED_TIMING_VERTICAL_ACTIVE(*t) == 0 ||
EDID_DETAILED_TIMING_VERTICAL_BLANKING(*t) == 0 ||
EDID_DETAILED_TIMING_HSYNC_OFFSET(*t) == 0 ||
- EDID_DETAILED_TIMING_HSYNC_PULSE_WIDTH(*t) == 0 ||
EDID_DETAILED_TIMING_VSYNC_OFFSET(*t) == 0 ||
- EDID_DETAILED_TIMING_VSYNC_PULSE_WIDTH(*t) == 0 ||
- /* 3d formats are not supported*/
+ /* 3d formats are not supported */
EDID_DETAILED_TIMING_FLAG_STEREO(*t) != 0)
return -EINVAL;
return 0;
}
+
+void video_ctfb_mode_to_display_timing(const struct ctfb_res_modes *mode,
+ struct display_timing *timing)
+{
+ timing->pixelclock.typ = mode->pixclock_khz * 1000;
+
+ timing->hactive.typ = mode->xres;
+ timing->hfront_porch.typ = mode->right_margin;
+ timing->hback_porch.typ = mode->left_margin;
+ timing->hsync_len.typ = mode->hsync_len;
+
+ timing->vactive.typ = mode->yres;
+ timing->vfront_porch.typ = mode->lower_margin;
+ timing->vback_porch.typ = mode->upper_margin;
+ timing->vsync_len.typ = mode->vsync_len;
+
+ timing->flags = 0;
+
+ if (mode->sync & FB_SYNC_HOR_HIGH_ACT)
+ timing->flags |= DISPLAY_FLAGS_HSYNC_HIGH;
+ else
+ timing->flags |= DISPLAY_FLAGS_HSYNC_LOW;
+ if (mode->sync & FB_SYNC_VERT_HIGH_ACT)
+ timing->flags |= DISPLAY_FLAGS_VSYNC_HIGH;
+ else
+ timing->flags |= DISPLAY_FLAGS_VSYNC_LOW;
+ if (mode->vmode == FB_VMODE_INTERLACED)
+ timing->flags |= DISPLAY_FLAGS_INTERLACED;
+}