nand: sunxi: Fix modulo by zero error

[oweals/u-boot.git] / drivers / video / mxsfb.c

diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index 03b0f88acfaa26cf930bbe8d6390b1b731de32b8..32ecbe2b0991c34b93cbecf7ba5f785f33286ad0 100644 (file)
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -12,7 +12,7 @@
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
 #include <asm/io.h>
 
 #include <asm/imx-common/dma.h>
@@ -55,7 +55,7 @@ static void mxs_lcd_init(GraphicDevice *panel,
        uint8_t valid_data = 0;
 
        /* Kick in the LCDIF clock */
-       mxs_set_lcdclk(PS2KHZ(mode->pixclock));
+       mxs_set_lcdclk(MXS_LCDIF_BASE, PS2KHZ(mode->pixclock));
 
        /* Restart the LCDIF block */
        mxs_reset_block(&regs->hw_lcdif_ctrl_reg);
@@ -131,6 +131,26 @@ static void mxs_lcd_init(GraphicDevice *panel,
        writel(LCDIF_CTRL_RUN, &regs->hw_lcdif_ctrl_set);
 }
 
+void lcdif_power_down(void)
+{
+       struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE;
+       int timeout = 1000000;
+
+       if (!panel.frameAdrs)
+               return;
+
+       writel(panel.frameAdrs, &regs->hw_lcdif_cur_buf_reg);
+       writel(panel.frameAdrs, &regs->hw_lcdif_next_buf_reg);
+       writel(LCDIF_CTRL1_VSYNC_EDGE_IRQ, &regs->hw_lcdif_ctrl1_clr);
+       while (--timeout) {
+               if (readl(&regs->hw_lcdif_ctrl1_reg) &
+                   LCDIF_CTRL1_VSYNC_EDGE_IRQ)
+                       break;
+               udelay(1);
+       }
+       mxs_reset_block((struct mxs_register_32 *)&regs->hw_lcdif_ctrl_reg);
+}
+
 void *video_hw_init(void)
 {
        int bpp = -1;