common: Drop linux/delay.h from common header

[oweals/u-boot.git] / drivers / usb / host / ehci-omap.c

diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index 032d5e5ec25b327ce85fda684c1aac4563304c9b..5fee5371400c6d42f2bf8ab7501fec7c7c1ed818 100644 (file)
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2011 Ilya Yanok, Emcraft Systems
  * (C) Copyright 2004-2008
@@ -7,12 +8,12 @@
  *     Sunil Kumar <sunilsaini05@gmail.com>
  *     Shashi Ranjan <shashiranjanmca05@gmail.com>
  *
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
+#include <log.h>
 #include <usb.h>
+#include <linux/delay.h>
 #include <usb/ulpi.h>
 #include <errno.h>
 #include <asm/io.h>
@@ -28,21 +29,48 @@ static struct omap_ehci *const ehci = (struct omap_ehci *)OMAP_EHCI_BASE;
 
 static int omap_uhh_reset(void)
 {
-/*
- * Soft resetting the UHH module causes instability issues on
- * all OMAPs so we just avoid it.
- *
- * See OMAP36xx Errata
- *  i571: USB host EHCI may stall when entering smart-standby mode
- *  i660: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
- *
- * On OMAP4/5, soft-resetting the UHH module will put it into
- * Smart-Idle mode and lead to a deadlock.
- *
- * On OMAP3, this doesn't seem to be the case but still instabilities
- * are observed on beagle (3530 ES1.0) if soft-reset is used.
- * e.g. NFS root failures with Linux kernel.
- */
+       int timeout = 0;
+       u32 rev;
+
+       rev = readl(&uhh->rev);
+
+       /* Soft RESET */
+       writel(OMAP_UHH_SYSCONFIG_SOFTRESET, &uhh->sysc);
+
+       switch (rev) {
+       case OMAP_USBHS_REV1:
+               /* Wait for soft RESET to complete */
+               while (!(readl(&uhh->syss) & 0x1)) {
+                       if (timeout > 100) {
+                               printf("%s: RESET timeout\n", __func__);
+                               return -1;
+                       }
+                       udelay(10);
+                       timeout++;
+               }
+
+               /* Set No-Idle, No-Standby */
+               writel(OMAP_UHH_SYSCONFIG_VAL, &uhh->sysc);
+               break;
+
+       default:        /* Rev. 2 onwards */
+
+               udelay(2); /* Need to wait before accessing SYSCONFIG back */
+
+               /* Wait for soft RESET to complete */
+               while ((readl(&uhh->sysc) & 0x1)) {
+                       if (timeout > 100) {
+                               printf("%s: RESET timeout\n", __func__);
+                               return -1;
+                       }
+                       udelay(10);
+                       timeout++;
+               }
+
+               writel(OMAP_UHH_SYSCONFIG_VAL, &uhh->sysc);
+               break;
+       }
+
        return 0;
 }
 
@@ -79,6 +107,7 @@ static void omap_usbhs_hsic_init(int port)
        writel(reg, &usbtll->channel_conf + port);
 }
 
+#ifdef CONFIG_USB_ULPI
 static void omap_ehci_soft_phy_reset(int port)
 {
        struct ulpi_viewport ulpi_vp;
@@ -88,15 +117,16 @@ static void omap_ehci_soft_phy_reset(int port)
 
        ulpi_reset(&ulpi_vp);
 }
-
-inline int __board_usb_init(void)
+#else
+static void omap_ehci_soft_phy_reset(int port)
 {
-       return 0;
+       return;
 }
-int board_usb_init(void) __attribute__((weak, alias("__board_usb_init")));
+#endif
 
 #if defined(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO) || \
-       defined(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO)
+       defined(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO) || \
+       defined(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO)
 /* controls PHY(s) reset signal(s) */
 static inline void omap_ehci_phy_reset(int on, int delay)
 {
@@ -115,6 +145,10 @@ static inline void omap_ehci_phy_reset(int on, int delay)
        gpio_request(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO, "USB PHY2 reset");
        gpio_direction_output(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO, !on);
 #endif
+#ifdef CONFIG_OMAP_EHCI_PHY3_RESET_GPIO
+       gpio_request(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, "USB PHY3 reset");
+       gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, !on);
+#endif
 
        /* Hold the PHY in RESET for enough time till DIR is high */
        /* Refer: ISSUE1 */
@@ -145,15 +179,15 @@ int omap_ehci_hcd_stop(void)
  * Based on "drivers/usb/host/ehci-omap.c" from Linux 3.1
  * See there for additional Copyrights.
  */
-int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata,
-               struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata,
+                      struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 {
        int ret;
        unsigned int i, reg = 0, rev = 0;
 
        debug("Initializing OMAP EHCI\n");
 
-       ret = board_usb_init();
+       ret = board_usb_init(index, USB_INIT_HOST);
        if (ret < 0)
                return ret;
 
@@ -198,10 +232,27 @@ int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata,
                else
                        setbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
        } else if (rev == OMAP_USBHS_REV2) {
+
                clrsetbits_le32(&reg, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR),
                                        OMAP4_UHH_HOSTCONFIG_APP_START_CLK);
 
-               /* Clear port mode fields for PHY mode*/
+               /* Clear port mode fields for PHY mode */
+
+               if (is_ehci_hsic_mode(usbhs_pdata->port_mode[0]))
+                       setbits_le32(&reg, OMAP_P1_MODE_HSIC);
+
+               if (is_ehci_hsic_mode(usbhs_pdata->port_mode[1]))
+                       setbits_le32(&reg, OMAP_P2_MODE_HSIC);
+
+       } else if (rev == OMAP_USBHS_REV2_1) {
+
+               clrsetbits_le32(&reg,
+                               (OMAP_P1_MODE_CLEAR |
+                                OMAP_P2_MODE_CLEAR |
+                                OMAP_P3_MODE_CLEAR),
+                               OMAP4_UHH_HOSTCONFIG_APP_START_CLK);
+
+               /* Clear port mode fields for PHY mode */
 
                if (is_ehci_hsic_mode(usbhs_pdata->port_mode[0]))
                        setbits_le32(&reg, OMAP_P1_MODE_HSIC);