Merge branch 'master' of git://git.denx.de/u-boot-arm
[oweals/u-boot.git] / drivers / usb / gadget / s3c_udc_otg.c
index 997d0ff860bb511d6bd0d15826b1c81aac02b87c..ba17a04265ebbbb11a06679874ed9ef23f35fa1a 100644 (file)
  * Marek Szyprowski <m.szyprowski@samsung.com>
  * Lukasz Majewski <l.majewski@samsumg.com>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
+ * SPDX-License-Identifier:    GPL-2.0+
  */
-
+#undef DEBUG
 #include <common.h>
 #include <asm/errno.h>
 #include <linux/list.h>
 #include <malloc.h>
 
 #include <linux/usb/ch9.h>
-#include <usbdescriptors.h>
 #include <linux/usb/gadget.h>
 
 #include <asm/byteorder.h>
@@ -125,6 +111,19 @@ static void nuke(struct s3c_ep *ep, int status);
 static int s3c_udc_set_halt(struct usb_ep *_ep, int value);
 static void s3c_udc_set_nak(struct s3c_ep *ep);
 
+void set_udc_gadget_private_data(void *p)
+{
+       debug_cond(DEBUG_SETUP != 0,
+                  "%s: the_controller: 0x%p, p: 0x%p\n", __func__,
+                  the_controller, p);
+       the_controller->gadget.dev.device_data = p;
+}
+
+void *get_udc_gadget_private_data(struct usb_gadget *gadget)
+{
+       return gadget->dev.device_data;
+}
+
 static struct usb_ep_ops s3c_ep_ops = {
        .enable = s3c_ep_enable,
        .disable = s3c_ep_disable,
@@ -168,8 +167,13 @@ void otg_phy_init(struct s3c_udc *dev)
                writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN)
                        &~FORCE_SUSPEND_0), &phy->phypwr);
 
-       writel((readl(&phy->phyclk) &~(ID_PULLUP0 | COMMON_ON_N0)) |
-              CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */
+       if (s5p_cpu_id == 0x4412)
+               writel((readl(&phy->phyclk) & ~(EXYNOS4X12_ID_PULLUP0 |
+                       EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ,
+                      &phy->phyclk); /* PLL 24Mhz */
+       else
+               writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)) |
+                      CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */
 
        writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST))
               | PHY_SW_RST0, &phy->rstcon);