Synchronize with U-BOOT mainline

[oweals/u-boot.git] / drivers / tsec.h

diff --git a/drivers/tsec.h b/drivers/tsec.h
index 31f18675fbfc86e2efac076aca0215a7fedce8b1..2f0092ad59888d6502ca245a0da5634b940f558d 100644 (file)
--- a/drivers/tsec.h
+++ b/drivers/tsec.h
@@ -7,7 +7,7 @@
  *  terms of the GNU Public License, Version 2, incorporated
  *  herein by reference.
  *
- * Copyright 2004 Freescale Semiconductor.
+ * Copyright 2004, 2007 Freescale Semiconductor, Inc.
  * (C) Copyright 2003, Motorola, Inc.
  * maintained by Xianghua Xiao (x.xiao@motorola.com)
  * author Andy Fleming
@@ -30,7 +30,7 @@
 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
     #define TSEC_BASE_ADDR     (CFG_IMMR + CFG_TSEC1_OFFSET)
 #elif defined(CONFIG_MPC83XX)
-    #define TSEC_BASE_ADDR     (CFG_IMMRBAR + CFG_TSEC1_OFFSET)
+    #define TSEC_BASE_ADDR     (CFG_IMMR + CFG_TSEC1_OFFSET)
 #endif
 
 
@@ -65,11 +65,14 @@
 #define ECNTRL_INIT_SETTINGS   0x00001000
 #define ECNTRL_TBI_MODE         0x00000020
 #define ECNTRL_R100            0x00000008
+#define ECNTRL_SGMII_MODE      0x00000002
 
 #define miim_end -2
 #define miim_read -1
 
-#define TBIPA_VALUE            0x1f
+#ifndef CFG_TBIPA_VALUE
+    #define CFG_TBIPA_VALUE    0x1f
+#endif
 #define MIIMCFG_INIT_VALUE     0x00000003
 #define MIIMCFG_RESET          0x80000000
 
@@ -109,6 +112,11 @@
 #define MIIM_GBIT_CONTROL      0x9
 #define MIIM_GBIT_CONTROL_INIT 0xe00
 
+/* Broadcom BCM54xx -- taken from linux sungem_phy */
+#define MIIM_BCM54xx_AUXSTATUS                 0x19
+#define MIIM_BCM54xx_AUXSTATUS_LINKMODE_MASK   0x0700
+#define MIIM_BCM54xx_AUXSTATUS_LINKMODE_SHIFT  8
+
 /* Cicada Auxiliary Control/Status Register */
 #define MIIM_CIS8201_AUX_CONSTAT        0x1c
 #define MIIM_CIS8201_AUXCONSTAT_INIT    0x0004
@@ -160,6 +168,23 @@
 #define MIIM_88E1011_PHYSTAT_SPDDONE   0x0800
 #define MIIM_88E1011_PHYSTAT_LINK      0x0400
 
+#define MIIM_88E1011_PHY_SCR           0x10
+#define MIIM_88E1011_PHY_MDI_X_AUTO    0x0060
+
+/* 88E1111 PHY LED Control Register */
+#define MIIM_88E1111_PHY_LED_CONTROL   24
+#define MIIM_88E1111_PHY_LED_DIRECT    0x4100
+#define MIIM_88E1111_PHY_LED_COMBINE   0x411C
+
+/* 88E1145 Extended PHY Specific Control Register */
+#define MIIM_88E1145_PHY_EXT_CR 20
+#define MIIM_M88E1145_RGMII_RX_DELAY   0x0080
+#define MIIM_M88E1145_RGMII_TX_DELAY   0x0002
+
+#define MIIM_88E1145_PHY_PAGE   29
+#define MIIM_88E1145_PHY_CAL_OV 30
+
+
 /* DM9161 Control register values */
 #define MIIM_DM9161_CR_STOP    0x0400
 #define MIIM_DM9161_CR_RSTAN   0x1200