pci: Do not skip legacy IDE device configuration

[oweals/u-boot.git] / drivers / spi / ti_qspi.c

diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index 566625091200f51c697bfed1df5d1b7ef85556dd..3356c0f072e55da3d80ab9bbd4a051e4deab5ab1 100644 (file)
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -102,16 +102,24 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave)
        struct spi_slave *slave = &qslave->slave;
        u32 memval = 0;
 
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
        slave->memory_map = (void *)MMAP_START_ADDR_DRA;
 #else
        slave->memory_map = (void *)MMAP_START_ADDR_AM43x;
+       slave->op_mode_rx = 8;
 #endif
 
+#ifdef CONFIG_QSPI_QUAD_SUPPORT
+       memval |= (QSPI_CMD_READ_QUAD | QSPI_SETUP0_NUM_A_BYTES |
+                       QSPI_SETUP0_NUM_D_BYTES_8_BITS |
+                       QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE |
+                       QSPI_NUM_DUMMY_BITS);
+#else
        memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES |
                        QSPI_SETUP0_NUM_D_BYTES_NO_BITS |
                        QSPI_SETUP0_READ_NORMAL | QSPI_CMD_WRITE |
                        QSPI_NUM_DUMMY_BITS;
+#endif
 
        writel(memval, &qslave->base->setup0);
 }
@@ -243,7 +251,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
        uint status;
        int timeout;
 
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
        int val;
 #endif
 
@@ -253,7 +261,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
        /* Setup mmap flags */
        if (flags & SPI_XFER_MMAP) {
                writel(MM_SWITCH, &qslave->base->memswitch);
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
                val = readl(CORE_CTRL_IO);
                val |= MEM_CS;
                writel(val, CORE_CTRL_IO);
@@ -261,7 +269,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
                return 0;
        } else if (flags & SPI_XFER_MMAP_END) {
                writel(~MM_SWITCH, &qslave->base->memswitch);
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
                val = readl(CORE_CTRL_IO);
                val &= MEM_CS_UNSELECT;
                writel(val, CORE_CTRL_IO);
@@ -285,6 +293,13 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
                qslave->cmd |= QSPI_3_PIN;
        qslave->cmd |= 0xfff;
 
+/* FIXME: This delay is required for successfull
+ * completion of read/write/erase. Once its root
+ * caused, it will be remove from the driver.
+ */
+#ifdef CONFIG_AM43XX
+       udelay(100);
+#endif
        while (words--) {
                if (txp) {
                        debug("tx cmd %08x dc %08x data %02x\n",
@@ -307,6 +322,9 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
                        qslave->cmd |= QSPI_RD_SNGL;
                        debug("rx cmd %08x dc %08x\n",
                              qslave->cmd, qslave->dc);
+                       #ifdef CONFIG_DRA7XX
+                               udelay(500);
+                       #endif
                        writel(qslave->cmd, &qslave->base->cmd);
                        status = readl(&qslave->base->status);
                        timeout = QSPI_TIMEOUT;