spi: Zap sh_spi driver

[oweals/u-boot.git] / drivers / spi / ti_qspi.c

diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index 77fa17ee8ab1466c0ffd4e962611821b98295a54..0db0de8f1bf1aa963a69c712a1be695bc8eeb107 100644 (file)
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -6,6 +6,9 @@
  */
 
 #include <common.h>
+#include <cpu_func.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/arch/omap.h>
 #include <malloc.h>
@@ -16,6 +19,8 @@
 #include <asm/omap_gpio.h>
 #include <asm/omap_common.h>
 #include <asm/ti-common/ti-edma3.h>
+#include <linux/bitops.h>
+#include <linux/err.h>
 #include <linux/kernel.h>
 #include <regmap.h>
 #include <syscon.h>
@@ -59,6 +64,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define QSPI_SETUP0_ADDR_SHIFT         (8)
 #define QSPI_SETUP0_DBITS_SHIFT                (10)
 
+#define TI_QSPI_SETUP_REG(priv, cs)    (&(priv)->base->setup0 + (cs))
+
 /* ti qspi register set */
 struct ti_qspi_regs {
        u32 pid;
@@ -274,8 +281,8 @@ static void ti_qspi_copy_mmap(void *data, void *offset, size_t len)
        *((unsigned int *)offset) += len;
 }
 
-static void ti_qspi_setup_mmap_read(struct ti_qspi_priv *priv, u8 opcode,
-                                   u8 data_nbits, u8 addr_width,
+static void ti_qspi_setup_mmap_read(struct ti_qspi_priv *priv, int cs,
+                                   u8 opcode, u8 data_nbits, u8 addr_width,
                                    u8 dummy_bytes)
 {
        u32 memval = opcode;
@@ -295,7 +302,7 @@ static void ti_qspi_setup_mmap_read(struct ti_qspi_priv *priv, u8 opcode,
        memval |= ((addr_width - 1) << QSPI_SETUP0_ADDR_SHIFT |
                   dummy_bytes << QSPI_SETUP0_DBITS_SHIFT);
 
-       writel(memval, &priv->base->setup0);
+       writel(memval, TI_QSPI_SETUP_REG(priv, cs));
 }
 
 static int ti_qspi_set_mode(struct udevice *bus, uint mode)
@@ -316,13 +323,15 @@ static int ti_qspi_set_mode(struct udevice *bus, uint mode)
 static int ti_qspi_exec_mem_op(struct spi_slave *slave,
                               const struct spi_mem_op *op)
 {
+       struct dm_spi_slave_platdata *slave_plat;
        struct ti_qspi_priv *priv;
        struct udevice *bus;
+       u32 from = 0;
+       int ret = 0;
 
        bus = slave->dev->parent;
        priv = dev_get_priv(bus);
-       u32 from = 0;
-       int ret = 0;
+       slave_plat = dev_get_parent_platdata(slave->dev);
 
        /* Only optimize read path. */
        if (!op->data.nbytes || op->data.dir != SPI_MEM_DATA_IN ||
@@ -334,8 +343,9 @@ static int ti_qspi_exec_mem_op(struct spi_slave *slave,
        if (from + op->data.nbytes > priv->mmap_size)
                return -ENOTSUPP;
 
-       ti_qspi_setup_mmap_read(priv, op->cmd.opcode, op->data.buswidth,
-                               op->addr.nbytes, op->dummy.nbytes);
+       ti_qspi_setup_mmap_read(priv, slave_plat->cs, op->cmd.opcode,
+                               op->data.buswidth, op->addr.nbytes,
+                               op->dummy.nbytes);
 
        ti_qspi_copy_mmap((void *)op->data.buf.in,
                          (void *)priv->memory_map + from, op->data.nbytes);
@@ -389,7 +399,7 @@ static int ti_qspi_release_bus(struct udevice *dev)
        writel(0, &priv->base->dc);
        writel(0, &priv->base->cmd);
        writel(0, &priv->base->data);
-       writel(0, &priv->base->setup0);
+       writel(0, TI_QSPI_SETUP_REG(priv, slave_plat->cs));
 
        return 0;
 }