rockchip: rk3288: sdram: style fixes from rk3188 sdram review

[oweals/u-boot.git] / drivers / spi / tegra20_sflash.c

diff --git a/drivers/spi/tegra20_sflash.c b/drivers/spi/tegra20_sflash.c
index 5dc196b0d10f662a5c5d034ea040dc3571b9df22..ecbf4c16f3b5eb9435c9741df5787e62a1169961 100644 (file)
--- a/drivers/spi/tegra20_sflash.c
+++ b/drivers/spi/tegra20_sflash.c
@@ -37,7 +37,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SPI_CMD_CS1_EN                 BIT(6)
 #define SPI_CMD_CS0_EN                 BIT(5)
 #define SPI_CMD_BIT_LENGTH             BIT(4)
-#define SPI_CMD_BIT_LENGTH_MASK                0x0000001F
+#define SPI_CMD_BIT_LENGTH_MASK                GENMASK(4, 0)
 
 #define SPI_STAT_BSY                   BIT(31)
 #define SPI_STAT_RDY                   BIT(30)
@@ -88,7 +88,7 @@ static int tegra20_sflash_ofdata_to_platdata(struct udevice *bus)
 {
        struct tegra_spi_platdata *plat = bus->platdata;
        const void *blob = gd->fdt_blob;
-       int node = bus->of_offset;
+       int node = dev_of_offset(bus);
 
        plat->base = dev_get_addr(bus);
        plat->periph_id = clock_decode_periph_id(blob, node);
@@ -122,6 +122,10 @@ static int tegra20_sflash_probe(struct udevice *bus)
        priv->freq = plat->frequency;
        priv->periph_id = plat->periph_id;
 
+       /* Change SPI clock to correct frequency, PLLP_OUT0 source */
+       clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH,
+                              priv->freq);
+
        return 0;
 }