spi: xilinx_spi: Fix to configure CPOL, CPHA mask

[oweals/u-boot.git] / drivers / spi / tegra114_spi.c

diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c
index 0d69376e4e09d080b48506d954bd37fe606f9a61..a965f80aebb5b5f5e95a27e80395d2651a09b09a 100644 (file)
--- a/drivers/spi/tegra114_spi.c
+++ b/drivers/spi/tegra114_spi.c
@@ -118,7 +118,7 @@ static int tegra114_spi_ofdata_to_platdata(struct udevice *bus)
        const void *blob = gd->fdt_blob;
        int node = bus->of_offset;
 
-       plat->base = fdtdec_get_addr(blob, node, "reg");
+       plat->base = dev_get_addr(bus);
        plat->periph_id = clock_decode_periph_id(blob, node);
 
        if (plat->periph_id == PERIPH_ID_NONE) {
@@ -144,6 +144,7 @@ static int tegra114_spi_probe(struct udevice *bus)
        struct tegra_spi_platdata *plat = dev_get_platdata(bus);
        struct tegra114_spi_priv *priv = dev_get_priv(bus);
        struct spi_regs *regs;
+       ulong rate;
 
        priv->regs = (struct spi_regs *)plat->base;
        regs = priv->regs;
@@ -152,9 +153,20 @@ static int tegra114_spi_probe(struct udevice *bus)
        priv->freq = plat->frequency;
        priv->periph_id = plat->periph_id;
 
-       /* Change SPI clock to correct frequency, PLLP_OUT0 source */
-       clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH,
-                              priv->freq);
+       /*
+        * Change SPI clock to correct frequency, PLLP_OUT0 source, falling
+        * back to the oscillator if that is too fast.
+        */
+       rate = clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH,
+                                     priv->freq);
+       if (rate > priv->freq + 100000) {
+               rate = clock_start_periph_pll(priv->periph_id, CLOCK_ID_OSC,
+                                             priv->freq);
+               if (rate != priv->freq) {
+                       printf("Warning: SPI '%s' requested clock %u, actual clock %lu\n",
+                              bus->name, priv->freq, rate);
+               }
+       }
 
        /* Clear stale status here */
        setbits_le32(&regs->fifo_status,