rockchip: spi: Avoid setting the pinctrl twice

[oweals/u-boot.git] / drivers / spi / ich.c

diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 6b6cfbf37512eb23942e40b66cfd53e29d8012da..59eaaea69396e8082ba373558d37c84f4ab8d53d 100644 (file)
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -40,6 +40,7 @@ struct ich_spi_priv {
        int status;
        int control;
        int bbar;
+       int bcr;
        uint32_t *pr;           /* only for ich9 */
        int speed;              /* pointer to speed control */
        ulong max_speed;        /* Maximum bus speed in MHz */
@@ -132,7 +133,8 @@ static int get_ich_version(uint16_t device_id)
            (device_id >= PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN &&
             device_id <= PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX) ||
            device_id == PCI_DEVICE_ID_INTEL_VALLEYVIEW_LPC ||
-           device_id == PCI_DEVICE_ID_INTEL_LYNXPOINT_LPC)
+           device_id == PCI_DEVICE_ID_INTEL_LYNXPOINT_LPC ||
+           device_id == PCI_DEVICE_ID_INTEL_WILDCATPOINT_LPC)
                return 9;
 
        return 0;
@@ -239,6 +241,7 @@ static int ich_init_controller(struct ich_spi_platdata *plat,
                ctlr->speed = ctlr->control + 2;
                ctlr->bbar = offsetof(struct ich9_spi_regs, bbar);
                ctlr->preop = offsetof(struct ich9_spi_regs, preop);
+               ctlr->bcr = offsetof(struct ich9_spi_regs, bcr);
                ctlr->pr = &ich9_spi->pr[0];
                ctlr->base = ich9_spi;
        } else {
@@ -411,6 +414,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
                        const void *dout, void *din, unsigned long flags)
 {
        struct udevice *bus = dev_get_parent(dev);
+       struct ich_spi_platdata *plat = dev_get_platdata(bus);
        struct ich_spi_priv *ctlr = dev_get_priv(bus);
        uint16_t control;
        int16_t opcode_index;
@@ -477,7 +481,10 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
        if (ret < 0)
                return ret;
 
-       ich_writew(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status);
+       if (plat->ich_version == 7)
+               ich_writew(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status);
+       else
+               ich_writeb(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status);
 
        spi_setup_type(trans, using_cmd ? bytes : 0);
        opcode_index = spi_setup_opcode(ctlr, trans);
@@ -684,17 +691,14 @@ static int ich_spi_probe(struct udevice *bus)
         * v9, deassert SMM BIOS Write Protect Disable.
         */
        if (plat->use_sbase) {
-               struct ich9_spi_regs *ich9_spi;
-
-               ich9_spi = priv->base;
-               bios_cntl = ich_readb(priv, ich9_spi->bcr);
-               bios_cntl &= ~(1 << 5); /* clear Enable InSMM_STS (EISS) */
+               bios_cntl = ich_readb(priv, priv->bcr);
+               bios_cntl &= ~BIT(5);   /* clear Enable InSMM_STS (EISS) */
                bios_cntl |= 1;         /* Write Protect Disable (WPD) */
-               ich_writeb(priv, bios_cntl, ich9_spi->bcr);
+               ich_writeb(priv, bios_cntl, priv->bcr);
        } else {
                pci_read_config_byte(plat->dev, 0xdc, &bios_cntl);
                if (plat->ich_version == 9)
-                       bios_cntl &= ~(1 << 5);
+                       bios_cntl &= ~BIT(5);
                pci_write_config_byte(plat->dev, 0xdc, bios_cntl | 0x1);
        }
 
@@ -736,7 +740,7 @@ static int ich_spi_child_pre_probe(struct udevice *dev)
        struct udevice *bus = dev_get_parent(dev);
        struct ich_spi_platdata *plat = dev_get_platdata(bus);
        struct ich_spi_priv *priv = dev_get_priv(bus);
-       struct spi_slave *slave = dev_get_parentdata(dev);
+       struct spi_slave *slave = dev_get_parent_priv(dev);
 
        /*
         * Yes this controller can only write a small number of bytes at
@@ -748,8 +752,8 @@ static int ich_spi_child_pre_probe(struct udevice *dev)
         * and byte program command for SST flash
         */
        if (plat->ich_version == 7) {
-               slave->op_mode_rx = SPI_OPM_RX_AS;
-               slave->op_mode_tx = SPI_OPM_TX_BP;
+               slave->mode_rx = SPI_RX_SLOW;
+               slave->mode = SPI_TX_BYTE;
        }
 
        return 0;