Merge branch 'master' of git://git.denx.de/u-boot-imx

[oweals/u-boot.git] / drivers / spi / fsl_qspi.c

diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index 2144fca665e227e0de7cbafed07a82480da1a7b2..e61c67b088bc7e267f44eaec916df7628b9fa5b4 100644 (file)
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -865,6 +865,7 @@ static inline struct fsl_qspi *to_qspi_spi(struct spi_slave *slave)
 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
                unsigned int max_hz, unsigned int mode)
 {
+       u32 mcr_val;
        struct fsl_qspi *qspi;
        struct fsl_qspi_regs *regs;
        u32 total_size;
@@ -896,8 +897,10 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 
        qspi->slave.max_write_size = TX_BUFFER_SIZE;
 
+       mcr_val = qspi_read32(qspi->priv.flags, &regs->mcr);
        qspi_write32(qspi->priv.flags, &regs->mcr,
-                    QSPI_MCR_RESERVED_MASK | QSPI_MCR_MDIS_MASK);
+                    QSPI_MCR_RESERVED_MASK | QSPI_MCR_MDIS_MASK |
+                    (mcr_val & QSPI_MCR_END_CFD_MASK));
 
        qspi_cfg_smpr(&qspi->priv,
                      ~(QSPI_SMPR_FSDLY_MASK | QSPI_SMPR_DDRSMP_MASK |
@@ -975,6 +978,7 @@ static int fsl_qspi_child_pre_probe(struct udevice *dev)
 
 static int fsl_qspi_probe(struct udevice *bus)
 {
+       u32 mcr_val;
        u32 amba_size_per_chip;
        struct fsl_qspi_platdata *plat = dev_get_platdata(bus);
        struct fsl_qspi_priv *priv = dev_get_priv(bus);
@@ -999,8 +1003,10 @@ static int fsl_qspi_probe(struct udevice *bus)
        priv->flash_num = plat->flash_num;
        priv->num_chipselect = plat->num_chipselect;
 
+       mcr_val = qspi_read32(priv->flags, &priv->regs->mcr);
        qspi_write32(priv->flags, &priv->regs->mcr,
-                    QSPI_MCR_RESERVED_MASK | QSPI_MCR_MDIS_MASK);
+                    QSPI_MCR_RESERVED_MASK | QSPI_MCR_MDIS_MASK |
+                    (mcr_val & QSPI_MCR_END_CFD_MASK));
 
        qspi_cfg_smpr(priv, ~(QSPI_SMPR_FSDLY_MASK | QSPI_SMPR_DDRSMP_MASK |
                QSPI_SMPR_FSPHS_MASK | QSPI_SMPR_HSENA_MASK), 0);
@@ -1031,8 +1037,11 @@ static int fsl_qspi_probe(struct udevice *bus)
         * setting the size of these devices to 0.  This would ensure
         * that the complete memory map is assigned to only one flash device.
         */
-       qspi_write32(priv->flags, &priv->regs->sfa1ad, priv->amba_base[1]);
+       qspi_write32(priv->flags, &priv->regs->sfa1ad,
+                    priv->amba_base[0] + amba_size_per_chip);
        switch (priv->num_chipselect) {
+       case 1:
+               break;
        case 2:
                qspi_write32(priv->flags, &priv->regs->sfa2ad,
                             priv->amba_base[1]);
@@ -1072,7 +1081,7 @@ static int fsl_qspi_ofdata_to_platdata(struct udevice *bus)
        struct fdt_resource res_regs, res_mem;
        struct fsl_qspi_platdata *plat = bus->platdata;
        const void *blob = gd->fdt_blob;
-       int node = bus->of_offset;
+       int node = dev_of_offset(bus);
        int ret, flash_num = 0, subnode;
 
        if (fdtdec_get_bool(blob, node, "big-endian"))
@@ -1092,7 +1101,7 @@ static int fsl_qspi_ofdata_to_platdata(struct udevice *bus)
        }
 
        /* Count flash numbers */
-       fdt_for_each_subnode(blob, subnode, node)
+       fdt_for_each_subnode(subnode, blob, node)
                ++flash_num;
 
        if (flash_num == 0) {