Major cleanup for AMCC PPC4xx eval boards.

[oweals/u-boot.git] / drivers / smc91111.c

diff --git a/drivers/smc91111.c b/drivers/smc91111.c
index 2a4f005345db4f3294a65186386bd9abb8847746..060da8ff2aaec74500bd5c400cdea60a42dd8f3c 100644 (file)
--- a/drivers/smc91111.c
+++ b/drivers/smc91111.c
@@ -640,8 +640,15 @@ again:
        }
 
        /* we have a packet address, so tell the card to use it */
+#ifndef CONFIG_XAENIAX
        SMC_outb (packet_no, PN_REG);
-
+#else
+       /* On Xaeniax board, we can't use SMC_outb here because that way
+        * the Allocate MMU command will end up written to the command register
+        * as well, which will lead to a problem.
+        */
+       SMC_outl (packet_no << 16, 0);
+#endif
        /* do not write new ptr value if Write data fifo not empty */
        while ( saved_ptr & PTR_NOTEMPTY )
                printf ("Write data fifo not empty!\n");
@@ -676,19 +683,39 @@ again:
         */
 #ifdef USE_32_BIT
        SMC_outsl (SMC91111_DATA_REG, buf, length >> 2);
+#ifndef CONFIG_XAENIAX
        if (length & 0x2)
                SMC_outw (*((word *) (buf + (length & 0xFFFFFFFC))),
                          SMC91111_DATA_REG);
+#else
+       /* On XANEIAX, we can only use 32-bit writes, so we need to handle
+        * unaligned tail part specially. The standard code doesn't work.
+        */
+       if ((length & 3) == 3) {
+               u16 * ptr = (u16*) &buf[length-3];
+               SMC_outl((*ptr) | ((0x2000 | buf[length-1]) << 16),
+                               SMC91111_DATA_REG);
+       } else if ((length & 2) == 2) {
+               u16 * ptr = (u16*) &buf[length-2];
+               SMC_outl(*ptr, SMC91111_DATA_REG);
+       } else if (length & 1) {
+               SMC_outl((0x2000 | buf[length-1]), SMC91111_DATA_REG);
+       } else {
+               SMC_outl(0, SMC91111_DATA_REG);
+       }
+#endif
 #else
        SMC_outsw (SMC91111_DATA_REG, buf, (length) >> 1);
 #endif /* USE_32_BIT */
 
+#ifndef CONFIG_XAENIAX
        /* Send the last byte, if there is one.   */
        if ((length & 1) == 0) {
                SMC_outw (0, SMC91111_DATA_REG);
        } else {
                SMC_outw (buf[length - 1] | 0x2000, SMC91111_DATA_REG);
        }
+#endif
 
        /* and let the chipset deal with it */
        SMC_outw (MC_ENQUEUE, MMU_CMD_REG);
@@ -702,7 +729,9 @@ again:
 
                /* release packet */
                /* no need to release, MMU does that now */
-               /* SMC_outw (MC_FREEPKT, MMU_CMD_REG); */
+#ifdef CONFIG_XAENIAX
+                SMC_outw (MC_FREEPKT, MMU_CMD_REG);
+#endif
 
                /* wait for MMU getting ready (low) */
                while (SMC_inw (MMU_CMD_REG) & MC_BUSY) {
@@ -722,7 +751,9 @@ again:
 
                /* release packet */
                /* no need to release, MMU does that now */
-               /* SMC_outw (MC_FREEPKT, MMU_CMD_REG); */
+#ifdef CONFIG_XAENIAX
+               SMC_outw (MC_FREEPKT, MMU_CMD_REG);
+#endif
 
                /* wait for MMU getting ready (low) */
                while (SMC_inw (MMU_CMD_REG) & MC_BUSY) {
@@ -735,7 +766,15 @@ again:
        }
 
        /* restore previously saved registers */
+#ifndef CONFIG_XAENIAX
        SMC_outb( saved_pnr, PN_REG );
+#else
+       /* On Xaeniax board, we can't use SMC_outb here because that way
+        * the Allocate MMU command will end up written to the command register
+        * as well, which will lead to a problem.
+        */
+       SMC_outl(saved_pnr << 16, 0);
+#endif
        SMC_outw( saved_ptr, PTR_REG );
 
        return length;
@@ -795,11 +834,11 @@ static int smc_open (bd_t * bd)
 
                address = smc_mac_addr[i + 1] << 8;
                address |= smc_mac_addr[i];
-               SMC_outw (address, ADDR0_REG + i);
+               SMC_outw (address, (ADDR0_REG + i));
        }
 #else
        for (i = 0; i < 6; i++)
-               SMC_outb (smc_mac_addr[i], ADDR0_REG + i);
+               SMC_outb (smc_mac_addr[i], (ADDR0_REG + i));
 #endif
 
        return 0;
@@ -913,7 +952,15 @@ static int smc_rcv()
                udelay(1); /* Wait until not busy */
 
        /* restore saved registers */
+#ifndef CONFIG_XAENIAX
        SMC_outb( saved_pnr, PN_REG );
+#else
+       /* On Xaeniax board, we can't use SMC_outb here because that way
+        * the Allocate MMU command will end up written to the command register
+        * as well, which will lead to a problem.
+        */
+       SMC_outl( saved_pnr << 16, 0);
+#endif
        SMC_outw( saved_ptr, PTR_REG );
 
        if (!is_error) {
@@ -1414,7 +1461,7 @@ static void smc_phy_configure ()
        /* Re-Configure the Receive/Phy Control register */
        SMC_outw (RPC_DEFAULT, RPC_REG);
 
-      smc_phy_configure_exit:
+smc_phy_configure_exit:        ;
 
 }
 #endif /* !CONFIG_SMC91111_EXT_PHY */
@@ -1550,7 +1597,7 @@ int get_rom_mac (char *v_rom_mac)
        SMC_SELECT_BANK (1);
        for (i=0; i<6; i++)
        {
-               v_rom_mac[i] = SMC_inb (ADDR0_REG + i);
+               v_rom_mac[i] = SMC_inb ((ADDR0_REG + i));
                valid_mac |= v_rom_mac[i];
        }