#include <asm/io.h>
#include <serial.h>
#include <asm/arch/stm32.h>
-#include <dm/platform_data/serial_stm32x7.h>
#include "serial_stm32x7.h"
DECLARE_GLOBAL_DATA_PTR;
static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
{
- struct stm32x7_serial_platdata *plat = dev->platdata;
- struct stm32_usart *const usart = plat->base;
- u32 clock, int_div, frac_div, tmp;
-
- if (((u32)usart & STM32_BUS_MASK) == APB1_PERIPH_BASE)
- clock = clock_get(CLOCK_APB1);
- else if (((u32)usart & STM32_BUS_MASK) == APB2_PERIPH_BASE)
- clock = clock_get(CLOCK_APB2);
- else
- return -EINVAL;
+ struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ bool stm32f4 = plat->uart_info->stm32f4;
+ fdt_addr_t base = plat->base;
+ u32 int_div, mantissa, fraction, oversampling;
+
+ int_div = DIV_ROUND_CLOSEST(plat->clock_rate, baudrate);
+
+ if (int_div < 16) {
+ oversampling = 8;
+ setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
+ } else {
+ oversampling = 16;
+ clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
+ }
- int_div = (25 * clock) / (4 * baudrate);
- tmp = ((int_div / 100) << USART_BRR_M_SHIFT) & USART_BRR_M_MASK;
- frac_div = int_div - (100 * (tmp >> USART_BRR_M_SHIFT));
- tmp |= (((frac_div * 16) + 50) / 100) & USART_BRR_F_MASK;
- writel(tmp, &usart->brr);
+ mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT;
+ fraction = int_div % oversampling;
+
+ writel(mantissa | fraction, base + BRR_OFFSET(stm32f4));
return 0;
}
static int stm32_serial_getc(struct udevice *dev)
{
- struct stm32x7_serial_platdata *plat = dev->platdata;
- struct stm32_usart *const usart = plat->base;
+ struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ bool stm32f4 = plat->uart_info->stm32f4;
+ fdt_addr_t base = plat->base;
- if ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0)
+ if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_RXNE) == 0)
return -EAGAIN;
- return readl(&usart->rd_dr);
+ return readl(base + RDR_OFFSET(stm32f4));
}
static int stm32_serial_putc(struct udevice *dev, const char c)
{
- struct stm32x7_serial_platdata *plat = dev->platdata;
- struct stm32_usart *const usart = plat->base;
+ struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ bool stm32f4 = plat->uart_info->stm32f4;
+ fdt_addr_t base = plat->base;
- if ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0)
+ if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_TXE) == 0)
return -EAGAIN;
- writel(c, &usart->tx_dr);
+ writel(c, base + TDR_OFFSET(stm32f4));
return 0;
}
static int stm32_serial_pending(struct udevice *dev, bool input)
{
- struct stm32x7_serial_platdata *plat = dev->platdata;
- struct stm32_usart *const usart = plat->base;
+ struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ bool stm32f4 = plat->uart_info->stm32f4;
+ fdt_addr_t base = plat->base;
if (input)
- return readl(&usart->sr) & USART_SR_FLAG_RXNE ? 1 : 0;
+ return readl(base + ISR_OFFSET(stm32f4)) &
+ USART_SR_FLAG_RXNE ? 1 : 0;
else
- return readl(&usart->sr) & USART_SR_FLAG_TXE ? 0 : 1;
+ return readl(base + ISR_OFFSET(stm32f4)) &
+ USART_SR_FLAG_TXE ? 0 : 1;
}
static int stm32_serial_probe(struct udevice *dev)
{
- struct stm32x7_serial_platdata *plat = dev->platdata;
- struct stm32_usart *const usart = plat->base;
-
-#ifdef CONFIG_CLK
- int ret;
+ struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
struct clk clk;
+ fdt_addr_t base = plat->base;
+ int ret;
+ bool stm32f4;
+ u8 uart_enable_bit;
+
+ plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev);
+ stm32f4 = plat->uart_info->stm32f4;
+ uart_enable_bit = plat->uart_info->uart_enable_bit;
ret = clk_get_by_index(dev, 0, &clk);
if (ret < 0)
dev_err(dev, "failed to enable clock\n");
return ret;
}
-#endif
- setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
+ plat->clock_rate = clk_get_rate(&clk);
+ if (plat->clock_rate < 0) {
+ clk_disable(&clk);
+ return plat->clock_rate;
+ };
+
+ /* Disable uart-> disable overrun-> enable uart */
+ clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
+ BIT(uart_enable_bit));
+ if (plat->uart_info->has_overrun_disable)
+ setbits_le32(base + CR3_OFFSET(stm32f4), USART_CR3_OVRDIS);
+ if (plat->uart_info->has_fifo)
+ setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
+ setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
+ BIT(uart_enable_bit));
return 0;
}
-#if CONFIG_IS_ENABLED(OF_CONTROL)
static const struct udevice_id stm32_serial_id[] = {
- {.compatible = "st,stm32-usart"},
- {.compatible = "st,stm32-uart"},
+ { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info},
+ { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
+ { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info},
{}
};
static int stm32_serial_ofdata_to_platdata(struct udevice *dev)
{
struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
- fdt_addr_t addr;
- addr = dev_get_addr(dev);
- if (addr == FDT_ADDR_T_NONE)
+ plat->base = devfdt_get_addr(dev);
+ if (plat->base == FDT_ADDR_T_NONE)
return -EINVAL;
- plat->base = (struct stm32_usart *)addr;
-
return 0;
}
-#endif
static const struct dm_serial_ops stm32_serial_ops = {
.putc = stm32_serial_putc,