/*
- * (C) Copyright 2015
- * Kamil Lulko, <rev13@wp.pl>
+ * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
+ * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
+#include <clk.h>
+#include <dm.h>
#include <asm/io.h>
#include <serial.h>
#include <asm/arch/stm32.h>
+#include "serial_stm32.h"
-#define STM32_USART1_BASE (STM32_APB2PERIPH_BASE + 0x1000)
-#define RCC_APB2ENR_USART1EN (1 << 4)
+DECLARE_GLOBAL_DATA_PTR;
-#define USART_BASE STM32_USART1_BASE
-#define RCC_USART_ENABLE RCC_APB2ENR_USART1EN
+static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
+{
+ struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ bool stm32f4 = plat->uart_info->stm32f4;
+ fdt_addr_t base = plat->base;
+ u32 int_div, mantissa, fraction, oversampling;
-struct stm32_serial {
- u32 sr;
- u32 dr;
- u32 brr;
- u32 cr1;
- u32 cr2;
- u32 cr3;
- u32 gtpr;
-};
+ int_div = DIV_ROUND_CLOSEST(plat->clock_rate, baudrate);
-#define USART_CR1_RE (1 << 2)
-#define USART_CR1_TE (1 << 3)
-#define USART_CR1_UE (1 << 13)
+ if (int_div < 16) {
+ oversampling = 8;
+ setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
+ } else {
+ oversampling = 16;
+ clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
+ }
-#define USART_SR_FLAG_RXNE (1 << 5)
-#define USART_SR_FLAG_TXE (1 << 7)
+ mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT;
+ fraction = int_div % oversampling;
-#define USART_BRR_F_MASK 0xF
-#define USART_BRR_M_SHIFT 4
-#define USART_BRR_M_MASK 0xFFF0
+ writel(mantissa | fraction, base + BRR_OFFSET(stm32f4));
-DECLARE_GLOBAL_DATA_PTR;
+ return 0;
+}
-static void stm32_serial_setbrg(void)
+static int stm32_serial_getc(struct udevice *dev)
{
- serial_init();
+ struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ bool stm32f4 = plat->uart_info->stm32f4;
+ fdt_addr_t base = plat->base;
+
+ if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_RXNE) == 0)
+ return -EAGAIN;
+
+ return readl(base + RDR_OFFSET(stm32f4));
}
-static int stm32_serial_init(void)
+static int stm32_serial_putc(struct udevice *dev, const char c)
{
- struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
- u32 clock, int_div, frac_div, tmp;
-
- if ((USART_BASE & STM32_BUS_MASK) == STM32_APB1PERIPH_BASE) {
- setbits_le32(&STM32_RCC->apb1enr, RCC_USART_ENABLE);
- clock = clock_get(CLOCK_APB1);
- } else if ((USART_BASE & STM32_BUS_MASK) == STM32_APB2PERIPH_BASE) {
- setbits_le32(&STM32_RCC->apb2enr, RCC_USART_ENABLE);
- clock = clock_get(CLOCK_APB2);
- } else {
- return -1;
- }
+ struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ bool stm32f4 = plat->uart_info->stm32f4;
+ fdt_addr_t base = plat->base;
- int_div = (25 * clock) / (4 * gd->baudrate);
- tmp = ((int_div / 100) << USART_BRR_M_SHIFT) & USART_BRR_M_MASK;
- frac_div = int_div - (100 * (tmp >> USART_BRR_M_SHIFT));
- tmp |= (((frac_div * 16) + 50) / 100) & USART_BRR_F_MASK;
+ if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_TXE) == 0)
+ return -EAGAIN;
- writel(tmp, &usart->brr);
- setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
+ writel(c, base + TDR_OFFSET(stm32f4));
return 0;
}
-static int stm32_serial_getc(void)
+static int stm32_serial_pending(struct udevice *dev, bool input)
{
- struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
- while ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0)
- ;
- return readl(&usart->dr);
+ struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ bool stm32f4 = plat->uart_info->stm32f4;
+ fdt_addr_t base = plat->base;
+
+ if (input)
+ return readl(base + ISR_OFFSET(stm32f4)) &
+ USART_SR_FLAG_RXNE ? 1 : 0;
+ else
+ return readl(base + ISR_OFFSET(stm32f4)) &
+ USART_SR_FLAG_TXE ? 0 : 1;
}
-static void stm32_serial_putc(const char c)
+static int stm32_serial_probe(struct udevice *dev)
{
- struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
- while ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0)
- ;
- writel(c, &usart->dr);
-}
+ struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ struct clk clk;
+ fdt_addr_t base = plat->base;
+ int ret;
+ bool stm32f4;
+ u8 uart_enable_bit;
+
+ plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev);
+ stm32f4 = plat->uart_info->stm32f4;
+ uart_enable_bit = plat->uart_info->uart_enable_bit;
+
+ ret = clk_get_by_index(dev, 0, &clk);
+ if (ret < 0)
+ return ret;
+
+ ret = clk_enable(&clk);
+ if (ret) {
+ dev_err(dev, "failed to enable clock\n");
+ return ret;
+ }
-static int stm32_serial_tstc(void)
-{
- struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
- u8 ret;
+ plat->clock_rate = clk_get_rate(&clk);
+ if (plat->clock_rate < 0) {
+ clk_disable(&clk);
+ return plat->clock_rate;
+ };
+
+ /* Disable uart-> disable overrun-> enable uart */
+ clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
+ BIT(uart_enable_bit));
+ if (plat->uart_info->has_overrun_disable)
+ setbits_le32(base + CR3_OFFSET(stm32f4), USART_CR3_OVRDIS);
+ if (plat->uart_info->has_fifo)
+ setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
+ setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
+ BIT(uart_enable_bit));
- ret = readl(&usart->sr) & USART_SR_FLAG_RXNE;
- return ret;
+ return 0;
}
-static struct serial_device stm32_serial_drv = {
- .name = "stm32_serial",
- .start = stm32_serial_init,
- .stop = NULL,
- .setbrg = stm32_serial_setbrg,
- .putc = stm32_serial_putc,
- .puts = default_serial_puts,
- .getc = stm32_serial_getc,
- .tstc = stm32_serial_tstc,
+static const struct udevice_id stm32_serial_id[] = {
+ { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info},
+ { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
+ { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info},
+ {}
};
-void stm32_serial_initialize(void)
+static int stm32_serial_ofdata_to_platdata(struct udevice *dev)
{
- serial_register(&stm32_serial_drv);
-}
+ struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
-__weak struct serial_device *default_serial_console(void)
-{
- return &stm32_serial_drv;
+ plat->base = devfdt_get_addr(dev);
+ if (plat->base == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ return 0;
}
+
+static const struct dm_serial_ops stm32_serial_ops = {
+ .putc = stm32_serial_putc,
+ .pending = stm32_serial_pending,
+ .getc = stm32_serial_getc,
+ .setbrg = stm32_serial_setbrg,
+};
+
+U_BOOT_DRIVER(serial_stm32) = {
+ .name = "serial_stm32",
+ .id = UCLASS_SERIAL,
+ .of_match = of_match_ptr(stm32_serial_id),
+ .ofdata_to_platdata = of_match_ptr(stm32_serial_ofdata_to_platdata),
+ .platdata_auto_alloc_size = sizeof(struct stm32x7_serial_platdata),
+ .ops = &stm32_serial_ops,
+ .probe = stm32_serial_probe,
+ .flags = DM_FLAG_PRE_RELOC,
+};
projects / oweals / u-boot.git / blobdiff