# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */
#elif defined(CONFIG_CPU_SH7722)
# define PADR 0xA4050120
+# undef PSDR
# define PSDR 0xA405013e
# define PWDR 0xA4050166
# define PSCR 0xA405011E
#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
#elif defined(CONFIG_CPU_SH7723) ||\
defined(CONFIG_CPU_SH7724)
-static inline int scbrr_calc(struct uart_port *port, int bps, int clk)
+static inline int scbrr_calc(struct uart_port port, int bps, int clk)
{
- if (port->type == PORT_SCIF)
+ if (port.type == PORT_SCIF)
return (clk+16*bps)/(32*bps)-1;
else
return ((clk*2)+16*bps)/(16*bps)-1;
}
-#define SCBRR_VALUE(bps, clk) scbrr_calc(port, bps, clk)
+#define SCBRR_VALUE(bps, clk) scbrr_calc(sh_sci, bps, clk)
#elif defined(__H8300H__) || defined(__H8300S__)
#define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1)
#else /* Generic SH */